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CY28329 Datasheet(PDF) 6 Page - Cypress Semiconductor

Part No. CY28329
Description  133-MHz Spread Spectrum Clock Synthesizer/Driver with Differential CPU Outputs
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Maker  CYPRESS [Cypress Semiconductor]
Homepage  http://www.cypress.com
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CY28329 Datasheet(HTML) 6 Page - Cypress Semiconductor

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CY28329
Document #: 38-07040 Rev. *E
Page 6 of 17
Data Byte 4:
Bit
Pin#
Name
Pin Description
Type
Power On
Default
Bit 7
Reserved, set = 0
R
0
Bit 6
Reserved, set = 0
R
0
Bit 5
33
3V66_0
3V66_0 Output Enable
1 = Enabled; 0 = Disabled
R/W
1
Bit 4
35
3V66_1/VCH
3V66_1/VCH Output Enable
1 = Enabled; 0 = Disabled
R/W
1
Bit 3
24
66IN/3V66_5
3V66_5 Output Enable
1 = Enable; 0 = Disable
Note: This bit should be used when pin 24 is configured as
3V66_5 output. do not clear this bit when pin 24 is
configured as 66IN input.
R/W
1
Bit 2
23
66BUFF2
66-MHz Buffered 2 Output Enable
1 = Enabled; 0 = Disabled
R/W
1
Bit 1
22
66BUFF1
66-MHz Buffered 1 Output Enable
1 = Enabled; 0 = Disabled
R/W
1
Bit 0
21
66BUFF0
66-MHz Buffered 0 Output Enable
1 = Enabled; 0 = Disabled
R/W
1
Data Byte 5:
Bit
Pin#
Name
Pin Description
Type
Power On
Default
Bit 7
Reserved, set = 0
R
0
Bit 6
Reserved, set = 0
R
0
Bit 5
21,22,23
66BUFF [2:0]
Tpd 66IN to 66BUFF propagation delay control
R/W
0
Bit 4
R/W
0
Bit 3
38
DOT
DOT edge rate control
R/W
0
Bit 2
R/W
0
Bit 1
39
USB
USB edge rate control
R/W
0
Bit 0
R/W
0
Byte 6: Vendor ID
Bit
Description
Type
Power On
Default
Bit 7
Revision Code Bit 3
R
0
Bit 6
Revision Code Bit 2
R
0
Bit 5
Revision Code Bit 1
R
0
Bit 4
Revision Code Bit 0
R
0
Bit 3
Vendor ID Bit 3
R
1
Bit 2
Vendor ID Bit 2
R
0
Bit 1
Vendor ID Bit 1
R
0
Bit 0
Vendor ID Bit 0
R
0


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