AD9543 datasheet(40/66 Pages) AD

Part #	AD9543

Description	Quad Input, 10-Output, Dual DPLL/IEEE 1588 Synchronizer and Jitter Cleaner

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Manufacturer	AD [Analog Devices]

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40 / 66 page

AD9543

Data Sheet

Rev. 0 | Page 40 of 66

CAL_COUNT =

CAL_COUNT + 1

CAL_COUNT = 0

VCO

CALIBRATION

OPERATION

CAL_COUNT > 1

NO

YES

SYSTEM CLOCK

RECALIBRATION LOOP

WRITE:

REGISTER 0x2000[2] = 0

WRITE:

REGISTER 0x000F = 0x01

WRITE:

REGISTER 0x000F = 0x01

WRITE:

REGISTER 0x2000[2] = 1

START TIMEOUT CLOCK:

TIME = 0

REGISTER 0x3001[1:0] = 0x3

TIMEOUT CLOCK:

TIME > SYSCLK_TO1

NO

YES

NO

YES

SYSTEM CLOCK

LOCKED AND

STABLE POLLING LOOP

END

(TO RST_COUNT CHECK)

END

START

1SYSCLK_TO IS A CALCULATED TIME OUT VALUE.

IT IS 50ms + SYSTEM CLOCK VALIDATION TIME (REGISTER 0x207 TO REGISTER 0x209 [UNITS OF ms])

Figure 45. AD9543 System Clock Initialization Subprocess

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