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MC9S08PA4 Datasheet(PDF) 1 Page - NXP Semiconductors |
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MC9S08PA4 Datasheet(HTML) 1 Page - NXP Semiconductors |
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1 / 29 page  MC9S08PA4 MC9S08PA4 Data Sheet Supports: MC9S08PA4(A) Key features • 8-Bit S08 central processor unit (CPU) – Up to 20 MHz bus at 2.7 V to 5.5 V across operating temperature range – Supporting up to 40 interrupt/reset sources – Supporting up to four-level nested interrupt – On-chip memory – Up to 4 KB flash read/program/erase over full operating voltage and temperature – Up to 128 byte EEPROM; 2-byte erase sector; program and erase while executing flash – Up to 512 byte random-access memory (RAM) – Flash and RAM access protection • Power-saving modes – One low-power stop mode; reduced power wait mode – Peripheral clock enable register can disable clocks to unused modules, reducing currents; allows clocks to remain enabled to specific peripherals in stop3 mode • Clocks – Oscillator (XOSC) - loop-controlled Pierce oscillator; crystal or ceramic resonator range of 31.25 kHz to 39.0625 kHz or 4 MHz to 20 MHz – Internal clock source (ICS) - containing a frequency- locked-loop (FLL) controlled by internal or external reference; precision trimming of internal reference allowing 1% deviation across temperature range of 0 °C to 70 °C and 2% deviation across whole operating temperature range; up to 20 MHz • System protection – Watchdog with independent clock source – Low-voltage detection with reset or interrupt; selectable trip points – Illegal opcode detection with reset – Illegal address detection with reset • Development support – Single-wire background debug interface – Breakpoint capability to allow three breakpoints setting during in-circuit debugging – On-chip in-circuit emulator (ICE) debug module containing two comparators and nine trigger modes • Peripherals – ACMP - one analog comparator with both positive and negative inputs; separately selectable interrupt on rising and falling comparator output; filtering – ADC - 8-channel, 12-bit resolution; 2.5 µs conversion time; data buffers with optional watermark; automatic compare function; internal bandgap reference channel; operation in stop mode; optional hardware trigger – FTM - Three 2-channel flex timer modulators modules; 16-bit counter; each channel can be configured for input capture, output compare, edge- or center-aligned PWM mode – RTC - 16-bit real timer counter (RTC) – SCI - one serial communication interface (SCI/ UART) modules optional 13-bit break; full duplex non-return to zero (NRZ); LIN extension support • Input/Output – Up to 18 GPIOs including one output-only pin – One 8-bit keyboard interrupt module (KBI) – Two, ultra-high current sink pins supporting 20 mA source/sink current • Package options – 20-pin SOIC – 20-pin TSSOP – 16-pin TSSOP – 8-pin DFN – 8-pin SOIC NXP Semiconductors Document Number MC9S08PA4 Data Sheet: Technical Data Rev. 8, 08/2018 NXP reserves the right to change the production detail specifications as may be required to permit improvements in the design of its products. |
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