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8533AG-01LF Datasheet(PDF) 2 Page - Integrated Device Technology

Part No. 8533AG-01LF
Description  Different ial-to-3.3V LVPECL Fanout Buffer
Download  17 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

8533AG-01LF Datasheet(HTML) 2 Page - Integrated Device Technology

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8533-01 Data Sheet
©2016 Integrated Device Technology, Inc
Revision F January 19, 2016
2
TABLE 1. PIN DESCRIPTIONS
TABLE 2. PIN CHARACTERISTICS
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
C
IN
Input Capacitance
4
pF
R
PULLUP
Input Pullup Resistor
51
kΩ
R
PULLDOWN
Input Pulldown Resistor
51
kΩ
Number
Name
Type
Description
1V
EE
Power
Negative supply pin.
2
CLK_EN
Input
Pullup
Synchronizing clock enable. When HIGH, clock outputs follow clock input.
When LOW, Q outputs are forced low, nQ outputs are forced high. LVC-
MOS / LVTTL interface levels.
3
CLK_SEL
Input
Pulldown
Clock select input. When HIGH, selects differential PCLK, nPCLK inputs.
When LOW, selects CLK, nCLK inputs. LVCMOS / LVTTL interface levels.
4
CLK
Input
Pulldown Non-inverting differential clock input.
5
nCLK
Input
Pullup
Inverting differential clock input.
6
PCLK
Input
Pulldown Non-inverting differential LVPECL clock input.
7
nPCLK
Input
Pullup
Inverting differential LVPECL clock input.
8, 9
nc
Unused
No connect.
10, 13, 18
V
CC
Power
Positive supply pins.
11, 12
nQ3, Q3
Output
Differential output pair. LVPECL interface levels.
14, 15
nQ2, Q2
Output
Differential output pair. LVPECL interface levels.
16, 17
nQ1, Q1
Output
Differential output pair. LVPECL interface levels.
19, 20
nQ0, Q0
Output
Differential output pair. LVPECL interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.


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