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SN74AUP1G97 Datasheet(PDF) 2 Page - Texas Instruments |
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SN74AUP1G97 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 18 page www.ti.com DESCRIPTION/ORDERING INFORMATION (CONTINUED) −0.5 0 0.5 1 1.5 2 2.5 3 3.5 0 5 10 15 20 25 30 35 40 45 Time − ns Output Input Switching Characteristics at 25 MHz† † AUP1G08 data at CL = 15 pF SN74AUP1G97 LOW-POWER CONFIGURABLE MULTIPLE-FUNCTION GATE SCES505D – NOVEMBER 2003 – REVISED JUNE 2005 Figure 2. Excellent Signal Integrity The SN74AUP1G97 features configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions MUX, AND, OR, NAND, NOR, inverter, and noninverter. All inputs can be connected to VCC or GND. The device functions as an independent gate with Schmitt-trigger inputs, which allows for slow input transition and better switching-noise immunity at the input. NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING(2) NanoStar™ – WCSP (DSBGA) Tape and reel SN74AUP1G97YEPR 0.23-mm Large Bump – YEP _ _ _HP_ NanoFree™ – WCSP (DSBGA) Tape and reel SN74AUP1G97YZPR 0.23-mm Large Bump – YZP (Pb-free) –40°C to 85°C SOT (SOT-23) – DBV Tape and reel SN74AUP1G97DBVR H97_ SOT (SC-70) – DCK Tape and reel SN74AUP1G97DCKR HP_ SOT (SOT-553) – DRL Reel of 4000 SN74AUP1G97DRLR (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. (2) DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site. YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, ⋅ = Pb-free). FUNCTION TABLE INPUTS OUTPUT Y C B A L L L L L L H L L H L H L H H H H L L L H L H H H H L L H H H H 2 |
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