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LMX2323 Datasheet(PDF) 8 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part No. LMX2323
Description  PLLatinum 2.0 GHz Frequency Synthesizer for RF Personal Communications
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

LMX2323 Datasheet(HTML) 8 Page - National Semiconductor (TI)

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2.0 Programming Description (Continued)
2.2.3 LD_OUT Truth Table (R[13]-[15])
LD Pin Output
R[15]
R[14]
R[13]
Digital Lock Detect
0
0
0
Analog Lock Detect
0
0
1
R Divider Output
0
1
0
N Divider Output
0
1
1
Test Mode
1
0
0
Note: Do not use Test mode in normal operation. Test mode is for factory testing purpose only. It allows direct testing of the digital lock detect by using the CLK and
Data as the R and N counter outputs.
The Lock Detect Digital Filter compares the phase difference of the inputs from the phase detector to a RC generated delay of
approximately 15 ns. To enter the locked state (LD = High), the phase error must be less than the 15 ns RC delay for 5
consecutive reference cycles. Once in lock, the RC delay is changed to approximately 30 ns. To exit the locked state, the phase
error must be greater than the 30 ns RC delay. When the PLL is in power down mode, LD is forced to High state. A flow chart of
the digital filter is shown as below:
www.national.com
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