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ICS2309MI-1H Datasheet(PDF) 2 Page - Integrated Circuit Systems |
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ICS2309MI-1H Datasheet(HTML) 2 Page - Integrated Circuit Systems |
2 / 9 page 3.3 VOLT ZERO DELAY, LOW SKEW BUFFER MDS 2309 D 2 Revision 052405 In te gr ated Circuit Systems ● 5 25 Race Stree t, San Jose, CA 951 26 ● te l (40 8) 2 97-12 01 ● www.icst.com ICS2309 Pin Assignment Output Clock Mode Select Table Note 1. Outputs are in high impedance state Note 2. Buffer mode only; not zero delay between input and output Pin Descriptions 12 1 11 2 10 CLKIN CLKOUT 3 9 CLKA1 4 CLKA2 CLKA4 5 VDD 6 CLKA3 7 GND 8 CLKB1 VDD GND CLKB4 CLKB2 CLKB3 S2 S1 16 15 14 13 16 pin narrow (150 mil) SOIC S2 S1 CLKA1:A4 CLKB1:B4 A & B Source PLL Status 0 0 Tri-state (note 1) Tri-state (note 1) PLL OFF 0 1 Running Tri-state (note 1) PLL ON 1 0 Running Running CLKIN (note 2) OFF 1 1 Running Running PLL ON Pin Number Pin Name Pin Type Pin Description 1 CLKIN Input Clock input (5 V tolerant). 2 - 3 CLKA1:A4 Output Clock outputs A1:A4. See table above. 4 VDD Power Power supply. Connect to 3.3 V. 5 GND Power Connect to ground. 6 - 7 CLKB1:B4 Output Clock outputs B1:B4. See table above. 8 S2 Input Select input 2. See table above. Internal pull-up. 9 S1 Input Select input 1. See table above. Internal pull-up. 10 - 11 CLKB1:B4 Output Clock outputs B1:B4. See table above. 12 GND Power Connect to ground. 13 VDD Power Power supply. Connect to 3.3 V. 14 - 15 CLKA1:A4 Output Clock outputs A1:A4. See table above. 16 CLKOUT Input Buffered output. Internall feedback on this pin. |
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