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CYW20737L Datasheet(PDF) 4 Page - Cypress Semiconductor |
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CYW20737L Datasheet(HTML) 4 Page - Cypress Semiconductor |
4 / 24 page Document Number: 002-14886 Rev. *C Page 4 of 24 CYW20737L 1. Functional Description 1.1 External Reset External reset timing for the CYW20737L is illustrated in Figure 2. Figure 2. External Reset Timing 1.2 32.768 kHz Oscillator The CYW20737L includes a standard Pierce oscillator. The oscillator circuit includes a comparator with hysteresis on the output to create a single-ended digital output. The hysteresis eliminates chatter when the input is near the comparator threshold (~100 mV). The oscillator circuit can is designed for a 32 kHz or 32.768 kHz crystal oscillator, and can also be driven by an external clock input with a similar frequency. Characteristics for a 32 kHz oscillator are defined in Table 2. 1.3 External DC-DC Switcher Characteristics The CYW20737L requires an external 1.2V DC switcher to operate its internal digital and RF circuits. A suitable low-power, low-noise switcher must be supplied for proper circuit operation. Digital and analog I/Os, as well as the internal EEPROM operation from the VBAT/VDDIO, can be from 1.62V to 3.63V. The recommended setting is 3V nominal voltage. The following switcher, from Torex Semiconductor LTD, has been qualified and is recommended for all designs. ■ XC9265B/D (see http://www.torexsemi.com/products/detail.php?id=623) Table 2. 32 kHz Crystal Oscillator Characteristics Parameter Symbol Conditions Min. Typ. Max. Unit Output frequency Foscout – – 32.768 – kHz Frequency tolerance Ftol Crystal-dependent – 100 – ppm Start-up time Tstartup –– – 500 µs Crystal drive level Pdrv For crystal selection 0.5 – – µW Crystal series resistance Rseries For crystal selection – – 70 kΩ Crystal shunt capacitance Cshunt For crystal selection – – 1.3 pF RESET_N Pulse width >20 µs Crystal Enable Baseband Reset Start reading EEPROM and firmware boot Crystal warm‐up delay: ~ 5 ms |
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