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ZL30105 Datasheet(PDF) 18 Page - Zarlink Semiconductor Inc

Part # ZL30105
Description  T1/E1/SDH Stratum 3 Redundant System Clock Synchonizer for AdvancedTCA and H.110
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Manufacturer  ZARLINK [Zarlink Semiconductor Inc]
Direct Link  http://www.zarlink.com
Logo ZARLINK - Zarlink Semiconductor Inc

ZL30105 Datasheet(HTML) 18 Page - Zarlink Semiconductor Inc

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ZL30105
Data Sheet
18
Zarlink Semiconductor Inc.
3.0
Control and Modes of Operation
3.1
Application Selection
3.2
Loop Filter and Limiter Selection
The loop filter and limiter settings are selected through the APP_SEL and SEC_MSTR pins, see Table 2. The
maximum loop filter bandwidth is also dependent on the frequency of the currently selected reference (REF0/1/2).
APP_SEL
Application
Applicable Standard
Out Of Range Limits
00
DS1
ANSI T1.403
Telcordia GR-1244-CORE Stratum 4/4E
64 - 83 ppm
01
E1
ITU-T G.703
ETSI ETS 300 011
100 - 130 ppm
10
PDH Stratum 3
Telcordia GR-1244-CORE Stratum 3
9.2 - 12 ppm
11
SDH
ITU-T G.813 Option 1
Telcordia GR-253-CORE
9.2 - 12 ppm
Table 1 - Application Selection and the Out of Range Limits
APP_SEL
SEC_MSTR
Detected REF Frequency
Loop Filter Bandwidth
Phase Slope
Limiting
00, 01, 10
0
any
1.8 Hz
61
µ/s
11
0
any
3.6 Hz
7.5
µ/s
00, 01, 10, 11
1
2 kHz
14 Hz
9.5 ms /s
8 kHz
58 Hz
9.5 ms /s
1.544 MHz, 2.048 MHz,
8.192 MHz, 16.384 MHz,
19.44 MHz
922 Hz
9.5 ms /s
Table 2 - Loop Filter and Limiter Settings


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