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5962-01A1701Q9A Datasheet(PDF) 11 Page - ATMEL Corporation |
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5962-01A1701Q9A Datasheet(HTML) 11 Page - ATMEL Corporation |
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11 / 31 page  11 TSS901E Rev. C – 24-Aug-01 53 53 53 CH3_DSM_TSTR channel 3 DSM test Register 00 r / w 54 54 54 CH3_ADDR channel 3 address Register 00 r / w 55 55 55 CH3_RT_ADDR channel 3 Route address Register 00 r / w 56 56 56 CH3__PR_STAR channel 3 Protocol Status Register 04 r / w 57 57 57 reserved 00 58 58 58 CH3_CNTRL1 channel 3 control Register 1 00 r / w 59 59 59 CH3_CNTRL2 channel 3 control Register 2 00 r / w 5A 5A 5A CH3_HTID channel 3 Header Transaction ID byte 00 ro 5B 5B 5B CH3_HCNTRL channel 3 Header control byte 00 ro 5C 5C 5C CH3_ESR1 channel 3 detailed error source register 1 00 r / w 5D 5D 5D CH3_ESR2 channel 3 detailed error source register 2 00 r / w 5E 5E 5E reserved 00 5F 5F 5F CH3_COMICFG channel 3 COMI configuration register 00 r / w 60 60 60 61 CH3_TX_SAR channel 3 transmit Start Address Register 00 r / w 62 62 62 63 CH3_TX_EAR channel 3 transmit End Address Register 00 r / w 64 64 64 65 CH3_TX_CAR channel 3 transmit Current Address Register 00 ro 66 66 66 CH3_TX_FIFO channel 3 transmit FIFO 00 wo 67 67 67 CH3_TX_EOPB channel 3 transmit EOP Bit Register 00 wo 68 68 68 69 CH3_RX_SAR channel 3 receive Start Address Register 00 r / w 6A 6A 6A 6B CH3_RX_EAR channel 3 receive End Address Register 00 r / w 6C 6C 6C 6D CH3_RX_CAR channel 3 receive Current Address Register 00 ro 6E 6E 6E CH3_RX_FIFO channel 3 receive FIFO xxxxxxxx ro 6F 6F 6F CH3_STAR channel 3 Status Register 01 ro Port Width / Address (hex) Register Function Reset Value (hex) Access 32 16 8 |
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