SPT774 datasheet(3/12 Pages) ETC

Part #	SPT774

Description	FAST, COMPLETE 12-BIT UP COMPATIBLE A/D CONVERTER WITH SAMPLE/HOLD

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SPT

3

8/1/00

SPT774

ELECTRICAL SPECIFICATIONS

TA = TMIN to TMAX, VEE = 0 to +5 V, VDD = +5 V, fS = 117 kHz, fIN = 10 kHz, unless otherwise specified.

TEST

SPT774C

SPT774B

PARAMETER

CONDITIONS

LEVEL

MIN

TYP

MAX

MIN

TYP

MAX

UNITS

DC ELECTRICAL CHARACTERISTICS

Power Supplies Operating

Voltage Range

VDD

IV

+4.5

+5.5

+4.5

+5.5

Volts

VEE2

IV

VDD

Volts

Operating Current

IDD

IV

15

24

15

24

mA

IEE2VEE = +5 V

IV

167

µA

Power Dissipation

VI

75

120

75

120

mW

Internal Reference

Voltage

VI

2.4

2.5

2.6

2.4

2.5

2.6

Volts

Output Current3

VI

0.5

mA

DIGITAL CHARACTERISTICS

Logic Inputs

(CE, CS , R/C , Ao, 12/8 )

Logic 0

VI

-0.5

+0.8

-0.5

+0.8

Volts

Logic1

VI

2.0

5.5

2.0

5.5

Volts

Current

VI

-5.0

0. 1

5.0

-5.0

0. 1

5.0

µA

Capacitance

V

5

pF

Logic Outputs

(DB11-DB0, STS)

Logic 0

(ISink = 1.6 mA)

VI

+0.4

Volts

Logic 1

(ISOURCE = 500 µA)

VI

+2.4

Volts

Leakage

(High Z State,

VI

-5

0.1

+5

-5

0.1

+5

µA

DB11-DB0 Only)

Capacitance

V

5

pF

AC Accuracy

fS=117 kHz, fIN=10 kHz

Spurious Free Dyn. Range

V

73

78

76

78

dB

Total Harmonic Distortion

V

-77

-72

-77

-75

dB

Signal-to-Noise Ratio

V

69

72

71

72

dB

Signal-to-Noise & Distortion

V

68

71

70

71

dB

(SINAD)

Intermodulation Distortion

fIN=20 kHz;

V

-75

dB

fIN2=23 kHz

Note 1: Fixed 50

Ω resistor from REF OUT to REF IN and REF OUT to BIP OFF.

Note 2: VEE is optional and is only used to set the mode for the internal sample/hold. When not using VEE, the pin should be treated

as a no connect. If VEE is connected to 0 to -15 V, aperture delay (tAP) will increase from 20 ns (typ) to 4000 ns (typ).

Note 3: Available for external loads; external load should not change during conversion.

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