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P60ARM-B Datasheet(PDF) 4 Page - Zarlink Semiconductor Inc |
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P60ARM-B Datasheet(HTML) 4 Page - Zarlink Semiconductor Inc |
4 / 120 page P60ARM-B iv 7.6 Load multiple registers 79 7.7 Store multiple registers 81 7.8 Data swap 81 7.9 Software interrupt and exception entry 82 7.10 Coprocessor data operation 83 7.11 Coprocessor data transfer (from memory to coprocessor) 83 7.12 Coprocessor data transfer (from coprocessor to memory) 85 7.13 Coprocessor register transfer (Load from coprocessor) 86 7.14 Coprocessor register transfer (Store to coprocessor) 86 7.15 Undefined instructions and coprocessor absent 87 7.16 Unexecuted instructions 87 7.17 Instruction Speed Summary 88 8.0 Boundary Scan Test Interface 89 8.1 Overview 89 8.2 Reset 90 8.3 Pullup Resistors 90 8.4 Instruction Register 90 8.5 Public Instructions 90 8.6 Test Data Registers 94 8.7 Boundary Scan Interface Signals 97 9.0 DC Parameters 101 9.1 Absolute Maximum Ratings 101 9.2 DC Operating Conditions 101 10.0 AC Parameters 105 10.1 Notes on AC Parameters 112 11.0 Physical Details 113 12.0 Pinout 115 13.0 Appendix - Backward Compatibility 117 |
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