NJU8721

-5 -

(7) Serial Audio Data Interface

(7-1) Input Data Format Selection

The digital audio interface format is selected out of I

bits data length.

(7-2) Input Timing

Digital audio signal data into DIN terminal is fetched into the internal shift register by BCK signal rising

edge. The fetched data in the shift register are transferred by rising edge or falling edge of LRCK as

shown below:

Data Format

Rising Edge

Falling Edge

I

Lch Input Register

Rch Input Register

MSB Justified

Rch Input Register

Lch Input Register

LSB Justified

Rch Input Register

Lch Input Register

BCK and LRCK must be synchronized with MCK.

Figure 3.1. 16 bits I

Left Channel

Right Channel

LRCK

BCK

DIN

14

0

1

15

13

14

0

1

15

13

Right Channel

Left Channel

Figure 3.2. 16 bits MSB Justified Data Format

LRCK

BCK

DIN

13

0

1

14

0

1

14

15

13

15

15

Figure 3.3. 16 bits LSB Justified Data Format

Left Channel

Right Channel

14

0

1

2

3

0

15

14

0

1

2

3

15

LRCK

BCK

DIN