Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

MSP430F2101 Datasheet(PDF) 6 Page - Texas Instruments

Click here to check the latest version.
Part No. MSP430F2101
Description  MIXED SIGNAL MICROCONTROLLER
Download  53 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
Logo 

MSP430F2101 Datasheet(HTML) 6 Page - Texas Instruments

Zoom Inzoom in Zoom Outzoom out
 6 / 53 page
background image
MSP430x21x1
MIXED SIGNAL MICROCONTROLLER
SLAS439C − SEPTEMBER 2004 − REVISED JULY 2006
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
interrupt vector addresses
The interrupt vectors and the power-up starting address are located in the address range of 0FFFFh−0FFC0h.
The vector contains the 16-bit address of the appropriate interrupt handler instruction sequence.
If the reset vector (located at address 0FFFEh) contains 0FFFFh (e.g. flash is not programmed) the CPU will
go into LPM4 immediately after power−up.
INTERRUPT SOURCE
INTERRUPT FLAG
SYSTEM INTERRUPT
WORD ADDRESS
PRIORITY
Power-up
External reset
Watchdog
Flash key violation
PC out-of-range (see Note 1)
PORIFG
RSTIFG
WDTIFG
KEYV
(see Note 2)
Reset
0FFFEh
31, highest
NMI
Oscillator fault
Flash memory access violation
NMIIFG
OFIFG
ACCVIFG
(see Notes 2 & 4)
(non)-maskable,
(non)-maskable,
(non)-maskable
0FFFCh
30
0FFFAh
29
0FFF8h
28
Comparator_A+
CAIFG
maskable
0FFF6h
27
Watchdog Timer+
WDTIFG
maskable
0FFF4h
26
Timer_A2
TACCR0 CCIFG (see Note 3)
maskable
0FFF2h
25
Timer_A2
TACCR1 CCIFG,
TAIFG (see Notes 2 & 3)
maskable
0FFF0h
24
0FFEEh
23
0FFECh
22
0FFEAh
21
0FFE8h
20
I/O Port P2
(eight flags)
P2IFG.0 to P2IFG.7
(see Notes 2 & 3)
maskable
0FFE6h
19
I/O Port P1
(eight flags)
P1IFG.0 to P1IFG.7
(see Notes 2 & 3)
maskable
0FFE4h
18
0FFE2h
17
0FFE0h
16
(see Note 5)
0FFDEh
15
(see Note 6)
0FFDCh ... 0FFC0h
14 ... 0, lowest
NOTES:
1. A reset is generated if the CPU tries to fetch instructions from within the module register memory address range (0h−01FFh).
2. Multiple source flags
3. Interrupt flags are located in the module
4. (non)-maskable: the individual interrupt-enable bit can disable an interrupt event, but the general interrupt enable cannot.
5. This location is used as bootstrap loader security key (BSLSKEY).
A value of 0AA55h at this location disables the BSL completely.
A value of 0h disables the erasure of the flash if an invalid password is supplied.
6. The interrupt vectors at addresses 0FFDCh to 0FFC0h are not used in this device and can be used for regular program code if
necessary.


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40  41  42  43  44  45  46  47  48  49  50  51  52  53 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn