LTC2904/LTC2905

9

sn29045 29045fs

leakage current allowable from the pin to either GND or V1

is 10µA.

In margining applications, all the 3-state input pins can be

driven using a tri-state buffer. Note however the low and

Table. Moreover, when the tri-state buffer is in the high

impedance state, the maximum leakage current allowed

from the pin to either GND or V1 is 10µA.

Monitor Programming

Connecting S1 and S2 to GND, V1 or leaving them open

selects the LTC2904/LTC2905 input voltage combina-

tions. Table 1 shows the nine possible combinations of

nominal input voltages and their corresponding S1, S2

connections.

Table 1. Voltage Threshold Programming

V1

V2

S1

S2

5.0

3.3

V1

V1

3.3

2.5

Open

GND

3.3

1.8

V1

Open

3.3

1.5

Open

V1

3.3

1.2

Open

Open

2.5

1.8

GND

GND

2.5

1.5

GND

Open

2.5

1.2

GND

V1

2.5

1.0

V1

GND

Note: Open = open circuit or driven by a three state buffer in high

impedance state with leakage current less than 10µA.

Tolerance Programming

The three-state input pin, TOL programs the common

supply tolerance for both V1 and V2 input voltages (5%,

7.5% or 10%). The larger the tolerance the lower the trip

threshold. Table 2 shows the tolerances selection corre-

sponding to a particular connection at the TOL pin.

Supply Monitoring

The LTC2904/LTC2905 are low power, high accuracy dual

supply monitors with a common reset output and select-

able thresholds. Reset delay is set to a nominal of 200ms

for the LTC2904 and is adjustable using an external

capacitor for the LTC2905.

The two three-state input pins (S1 and S2) select one of

nine possible threshold voltage combinations. Another

three-state input pin sets the supply tolerance (5%, 7.5%

or 10%). Both input voltages (V1 and V2) must be above

predetermined thresholds for the reset not to be invoked.

The LTC2904/LTC2905 assert the reset outputs during

power-up, power-down and brownout conditions on

either of the voltage inputs.

Power-Up

soon as V1 or V2 reaches 1V during power-up, the RST

output asserts low.

LTC2904. Therefore, RST weakly pulls high when V1 or V2

reaches at least 1V.

Threshold programming is complete when V1 reaches at

least 2.17V. After programming, if either V1 or V2 falls

below its programmed threshold, RST asserts low (RST

Once V1 and V2 rise above their thresholds, an internal

timer is started. After the programmed delay time, RST

weakly pulls high (RST asserts low).

Power-Down

On power-down, once either V1 or V2 inputs drops below

its threshold, RST asserts logic low and RST weakly pulls

RST.

Programming Pins

The three 3-state input pins: S1, S2 and TOL should be

connected to GND, V1 or left unconnected during normal

operation. Note that when left unconnected, the maximum

APPLICATIO S I FOR ATIO

Table 2. Tolerance Programming

Tolerance

TOL

5%

V1

7.5%

Open

10%

GND