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IDT72V2103L15PF Datasheet(PDF) 2 Page - Integrated Device Technology |
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IDT72V2103L15PF Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 46 page 2 IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC IITM NARROW BUS FIFO 8K x 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9 COMMERCIAL AND INDUSTRIAL TEMPERATURERANGES IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC IITM NARROW BUS FIFO 131,072 x 18/262,144 x 9, 262,144 x 18/524,288 x 9 The IDT72V2103/72V2113 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexibleBus-Matchingx9/x18dataflow.TheseFIFOsoffernumerousimprove- ments over previous SuperSync FIFOs, including the following: • Flexible x9/x18 Bus-Matching on both read and write ports. • Thelimitationofthefrequencyofoneclockinputwithrespecttotheotherhas been removed. The Frequency Select pin (FS) has been removed, thus it isnolongernecessarytoselectwhichofthetwoclockinputs,RCLKorWCLK, is running at the higher frequency. • The period required by the retransmit operation is now fixed and short. • The first word data latency period, from the time the first word is written to an empty FIFO to the time it can be read, is now fixed and short. (The variable clock cycle counting delay associated with the latency period found on previousSuperSyncdeviceshasbeeneliminatedonthisSuperSyncfamily.) • Asynchronous/Synchronous translation on the read or write ports. • High density offerings up to 4 Mbit. Bus-Matching SuperSync FIFOs are particularly appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes. PIN CONFIGURATIONS TQFP (PN80-1, order code: PF) TOP VIEW DESCRIPTION: DNC(1) OE 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 IW GND D17 D16 D14 D15 D13 GND D12 D11 D10 D9 D8 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 60 59 RT Q17 Q16 GND GND Q15 Q14 Q13 Q12 Q11 GND Q9 Q8 Q7 INDEX WEN SEN DNC(1) Q10 VCC 6119 drw02 20 1 VCC VCC VCC GND VCC VCC NOTE: 1. DNC = Do Not Connect. |
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