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NTE6821 Datasheet(PDF) 3 Page - NTE Electronics

Part No. NTE6821
Description  Integrated Circuit Peripheral Interface Adapter (PIA), NMOS, 1MHz
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Maker  NTE [NTE Electronics]
Homepage  http://www.nteinc.com
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NTE6821 Datasheet(HTML) 3 Page - NTE Electronics

   
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Bus Timing Characteristics (Cont’d): (VCC = 5V ±5%, VSS = 0, TA = 0° to +70°C unless otherwise
specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Setup Time, Address and R/W Valid to
Enable Positive Transition
tAS
160
ns
Address Hold Time
tAH
10
ns
Data Delay Time, Read
tDDR
320
ns
Data Hold Time, Read
tDHR
10
ns
Data Setup Time, Write
tDSW
195
ns
data Hold Time, Write
tDHW
10
ns
Peripheral Timing Characteristics:
(VCC = 5V ±5%, VSS = 0, TA = 0° to +70°C unless otherwise
specified)
Parameter
Symbol
Min
Max
Unit
Peripheral Data Setup Time
tPDSU
200
ns
Peripheral Data Hold Time
tPDH
0
ns
Delay Time, Enable negative transition to CA2 negative transition
tCA2
1.0
µs
Delay Time, Enable negative transition to CA2 positive transition
tRS1
1.0
µs
Rise and fall Times for CA1 and CA2 input signals
tr, tf
1.0
µs
Delay Time from CA1 active transition to CA2 positive transition
tRS2
2.0
µs
Delay Time, Enable negative transition to Peripheral Data Valid
tPDW
1.0
µs
Delay Time, Enable negative transition to Peripheral CMOS Data Valid PA0 – PA7, CA2
tCMOS
2.0
µs
Delay Time, Enable positive transition to CB2 negative transition
tCB2
1.0
µs
Delay Time, Peripheral Data Valid to CB2 negative transition
tDC
20
ns
Delay Time, Enable positive transition to CB2 postivie transition
tRS1
1.0
µs
Peripheral Control Output Pulse Width, CA2/CB2
PWCT
550
ns
Rise and Fall Time for CB1 and CB2 input signals
tr, tf
1.0
µs
Delay Time, CB1 active transition to CB2 positive transition
tRS2
2.0
µs
Interrupt Release Time, IRQA and IRQB
tIR
2.0
µs
Interrupt Response Time
tRS3
1.0
µs
Interrupt Input Pulse Width
PWI
500
ns
Reset Low Time (Note 2)
tRL
1.0
µs
Note 2. The Reset line must be high a minimum of 1.0
µs before addressing the PIA.


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