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ADRF6520 Datasheet(PDF) 5 Page - Analog Devices |
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ADRF6520 Datasheet(HTML) 5 Page - Analog Devices |
5 / 29 page Data Sheet ADRF6520 Rev. 0 | Page 5 of 29 Parameter Test Conditions/Comments Min Typ Max Unit Third Harmonic, HD3 330 MHz fundamental, 1.5 V p-p output level VGA1 gain = −6 dB, VGA2 = 0 dB −60.5 dBc VGA1 gain = 18 dB, VGA2 = 0 dB −62.5 VGA1 gain = 18 dB, VGA2 = 24 dB −70.4 dBc IMD3 496.5 MHz and 503.5 MHz tones, 1.5 V p-p composite output VGA1 gain = −6 dB, VGA2 = 0 dB −68.8 dBc VGA1 gain = 18 dB, VGA2 = 0 dB −70 dBc VGA1 gain = 18 dB, VGA2 = 24 dB −77 dBc DIGITAL LOGIC LE, CLK, DATA, SDO Input High Voltage, VHIGH >2 V Input Low Voltage, VLOW <0.8 V Input Current, IHIGH/ILOW <1 µA Input Capacitance, CIN 2 pF SPI TIMING LE, CLK, DATA, SDO fCLK 1/tCLK 20 MHz tDH DATA hold time 5 ns tDS DATA setup time 5 ns tLH LE hold time 5 ns tLS LE setup time 5 ns tPW CLK high pulse width 5 ns tD CLK to SDO delay 5 ns POWER AND ENABLE VPS, VPSD, COM, COMD, ENBL Supply Voltage Range 3.15 3.3 3.45 V Total Supply Current ENBL = 3.3 V Maximum bandwidth setting 425 mA Filter bypassed 390 mA Disable Current ENBL = 0 V 10 mA Disable Threshold 1.6 V Enable Response Time Delay following ENBL low to high transition 20 µs Disable Response Time Delay following ENBL high to low transition 300 ns |
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