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TW6874 Datasheet(PDF) 73 Page - Renesas Technology Corp |
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TW6874 Datasheet(HTML) 73 Page - Renesas Technology Corp |
73 / 92 page TW6874 FN8430 Rev 1.00 Page 73 of 92 March 25, 2015 TABLE 189. AUDCLKCTRL: AUDIO CLOCK CONTROL 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . READ-WRITE, ADDR = 0x133 BIT NAME BIT DEFINITION DEFAULT 7:3 Reserved Reserved 0x00 2 AIN51FORM AIN51/52/53/54 record output format selection. This bit is only effective when A51OUTOFF == 0. When AIN1/2/3/4/51 and AIN6/7/8/9/52 are required to be continuous in the record output, set this bit to 1. 0: If I2S mode (RM_SYNC == 0): L data: <dat0><dat1><dat2><dat3><dat4> <dat5><dat6><dat7><dat51><dat52> R data: <dat8><dat9><datA><datB><datC> <datD><datE><datF><dat53><dat54> If DSP mode (RM_SYNC == 1), all data are continuous: <dat0><dat1><dat2><dat3><dat4> <dat5><dat6><dat7><dat8><dat9> <datA><datB><datC><datD><datE> <datF><dat51><dat52><dat53><dat54> 1: If I2S mode (RM_SYNC == 0): L data: <dat0><dat1><dat2><dat3><dat51> <dat4><dat5><dat6><dat7><dat52> R data: <dat8><dat9><datA><datB><dat53> <datC><datD><datE><datF><dat54> If DSP mode (RM_SYNC == 1), all data are continuous: <dat0><dat1><dat2><dat3><dat51> <dat4><dat5><dat6><dat7><dat52> <dat8><dat9><datA><datB><dat53> <datC><datD><datE><datF><dat54> 0 1 Reserved Reserved 0 0 Reserved Reserved 1 TABLE 190. AUDFXCTRL: AUDIO SAMPLING MODE CONTROL. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . READ-WRITE, ADDR = 0x134 BIT NAME BIT DEFINITION DEFAULT 7 Reserved Reserved 0 6 ASYNSERIAL ALINKO/AINKI bit rate 0: 27MHz. Effective for all sampling frequencies. 1: 13.5MHz. Effective for 8/16kSps modes. 0 5 ACLKR128 ACLKR clock output mode for special 16x8-bit (128-bit total) data interface 0: ACLKR output is normal 1: 128 ACLKR clocks per sample. Effective when I2S_8BIT == 1 (special purpose 8-bit mode). 0 4 ACLKR64 ACLKR clock output mode for special 4-word output interface. Effective for ACLKRMASTER == 1 only. 0: ACLKR is normal 1: 64 ACLKR clocks per sample 0 3 AFS384 Special audio sampling mode. ACLKR runs at: 0: Normal sampling mode. If AIN5MD == 0: 256*fS 1: 384*fS 0 2 AIN5MD Audio input process mode 0: Four channel (AIN1/AIN2/AIN3/AIN4) audio input processing only. If AFS384 == 0: 256*fS. In this mode, AIN5 is not processed. 1: Five channel (AIN1/AIN2/AIN3/AIN4/AIN5) audio input processing. If AFS384 == 0: 320*fS. 0 1:0 I2SBITS Define output data format per one word unit on ADATR/ADATM pin 0: 16-bit one word unit output 1: 8-bit one word unit packed output 2: 24-bit one word unit packed output - applies to SDI audio only 3: Not defined 00 |
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