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TW2809C1 Datasheet(PDF) 50 Page - Renesas Technology Corp |
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TW2809C1 Datasheet(HTML) 50 Page - Renesas Technology Corp |
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50 / 130 page  TW2809C FN7875 Rev. 1.00 Page 50 of 130 February 27, 2014 Interrupt Status for PCI Host Driver PCI Host should read this registers when it receives PCI interrupt from TW2809. PDMA INTERRUPT STATUS REGISTER FOR PCI CHANNEL Address HIF base address + 0x4C Type r/w 31 30 29 28 27 26 25 24 INT_ EDGE_EN SMBUS_ ERR_INT_ST MMBUS_ ERR_INT_ST 23 22 21 20 19 18 17 16 WDOG_ INT_ST SLV_ INT_ST PERR_ INT_ST FATAL_ INT_ST RX_ INT_ST TX_ INT_ST CFG_ INT_ST COM_ INT_ST 15 14 13 12 11 10 9 8 SMBUS_ ERR_INT_EN MMBUS_ ERR_INT_EN 7 6 5 4 3 2 1 0 WDOG_ INT_EN SLV_ INT_EN PERR_ INT_EN FATAL_ INT_EN RX_ INT_EN TX_ INT_EN CFG_ INT_EN COM_ INT_EN [31] INT_EDGE_EN – It specfies the edge trigger interrupt. [30:26] reserved [25] SMBUS_ERR_INT_ST – It specfies the error of mbus for slave mode [24] MMBUS_ERR_INT_ST – It specfies the error of mbus for master mode [23] WDOG_INT_ST – It specfies the information of watch dog. [22] SLV_INT_ST – It specfies the interrupt for slave mode (debug mode) [21] PERR_INT_ST – It specifies the information of parity error interrupt. [20] FATAL_INT_ST – It specfies the information of fatal error interrupt. [19] RX_INT_ST – It specifies the information of end of RX transfer. [18] TX_INT_ST – It specifies the information of end of TX transfer. [17] CFG_INT_ST – It specifies the information of config interrupt. [16] COM_INT_ST – It specifies the information of command interrupt. [15:10] reserved [09] SMBUS_ERR_INT_EN – It specfies the mbus error interrupt enable for slave mode [08] MMBUS_ERR_INT_EN – It specfies the mbus error interrupt enable for master mode [07] WDOG_INT_EN – It specifies watch dog interrupt enable. [06] SLV_INT_EN – It specifies slave mode interrupt enable. [05] PERR_INT_EN – It specifies PCI parity error interrupt enable. [04] FATAL_INT_EN – It specifies PCI fatal error interrupt enable. [03] RX_INT_EN – It specifies RX END interrupt enable. [02] TX_INT_EN – It specifies TX END interrupt enable. [01] CFG_INT_EN – It specifies Configuration interrupt enable. [00] COM_INT_EN – It specifies Command interrupt enable. |
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