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ML87V2104 Datasheet(PDF) 4 Page - OKI electronic componets

Part No. ML87V2104
Description  Video Signal Noise Reduction and Field Rate Conversion IC with a Built-in 4M Bit Field Memory
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Maker  OKI [OKI electronic componets]
Homepage  http://www.oki.com
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ML87V2104 Datasheet(HTML) 4 Page - OKI electronic componets

 
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PEDL87V2104DIGEST-01
OKI Semiconductor
ML87V2104
4/13
PIN DESCRIPTIONS
No.
Symbol
I/O
Pad Remarks
Pin Description
1
VDD
Power supply 3.3 V
2
N.C.
Unused pin
3
N.C.
Unused pin
4
VSS
Ground
5
SDA
I/O
Schmitt(IN)/
OpenDrain(OUT)
I
2C-bus data pin
6
SCL
I
Schmitt
I
2C-bus clock pin
7
SLA1
I
pull-down 50k
Slave address setting pin
8
SLA2
I
pull-down 50k
Slave address setting pin
9
YI7
I
Luminance signal input pin bit 7 (MSB)
10
YI6
I
Luminance signal input pin bit 6
11
YI5
I
Luminance signal input pin bit 5
12
YI4
I
Luminance signal input pin bit 4
13
YI3
I
Luminance signal input pin bit 3
14
YI2
I
Luminance signal input pin bit 2
15
YI1
I
Luminance signal input pin bit 1
16
YI0
I
Luminance signal input pin bit 0 (LSB)
17
VDD
Power supply 3.3 V
18
ICLK
I
Input system clock pin
19
VSS
Ground
20
CI7
I
Chrominance signal input pin bit 7 (MSB)
21
CI6
I
Chrominance signal input pin bit 6
22
CI5
I
Chrominance signal input pin bit 5
23
CI4
I
Chrominance signal input pin bit 4
24
CI3
I
Chrominance signal input pin bit 3
25
CI2
I
Chrominance signal input pin bit 2
26
CI1
I
Chrominance signal input pin bit 1
27
CI0
I
Chrominance signal input pin bit 0 (LSB)
28
N.C.
Unused pin
29
N.C.
Unused pin
30
VDD
Power supply 3.3 V
31
VSS
Ground
32
IVS
I/O
Schmitt(IN)
pull-down 50k
Input vertical sync signal input/output pin
33
IHS
I/O
Schmitt(IN)
pull-down 50k
Input horizontal sync signal input/output pin
34
MODE0
I
pull-down 50k
Mode setting pin – bit 0
35
MODE1
I
pull-down 50k
Mode setting pin – bit 1
36
N.C.
Unused pin
37
MODE2
I
pull-down 50k
Mode setting pin – bit 2
38
CLKO
O
Clock output (I
2C-bus control possible)
39
VDD
Power supply 3.3 V
40
VSS
Ground
41
N.C.
Unused pin


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