KAD5512P-50 datasheet(8/29 Pages) RENESAS

Part #	KAD5512P-50

Description	12-Bit, 500MSPS A/D Converter

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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8 / 29 page

KAD5512P-50

FN6805 Rev 4.00

Page 8 of 29

May 31, 2016

Pin Descriptions

PIN #

LVDS [LVCMOS] NAME

LVDS [LVCMOS] FUNCTION

1, 6, 12, 19, 24, 71

AVDD

1.8V Analog Supply

2, 3, 4, 5, 13, 14, 17, 18, 28,

29, 30, 31

DNC

Do Not Connect

7, 8, 11, 72

AVSS

Analog Ground

9, 10

VINN, VINP

Analog Input Negative, Positive

15

VCM

Common-Mode Output

16

CLKDIV

Tri-Level Clock Divider Control

20, 21

CLKP, CLKN

Clock Input True, Complement

22

OUTMODE

Tri-Level Output Mode (LVDS, LVCMOS)

23

NAPSLP

Tri-Level Power Control (Nap, Sleep modes)

25

RESETN

Power-On Reset (Active Low, see “User Initiated Reset” on page 15)

26, 45, 55, 65

OVSS

Output Ground

27, 36, 56

OVDD

1.8V Output Supply

32

D0N

[NC]

LVDS Bit 0 (LSB) Output Complement

[NC in LVCMOS]

33

D0P

[D0]

LVDS Bit 0 (LSB) Output True

[LVCMOS Bit 0]

34

D1N

[NC]

LVDS Bit 1 Output Complement

[NC in LVCMOS]

35

D1P

[D1]

LVDS Bit 1 Output True

[LVCMOS Bit 1]

37

D2N

[NC]

LVDS Bit 2 Output Complement

[NC in LVCMOS]

38

D2P

[D2]

LVDS Bit 2 Output True

[LVCMOS Bit 2]

39

D3N

[NC]

LVDS Bit 3 Output Complement

[NC in LVCMOS]

40

D3P

[D3]

LVDS Bit 3 Output True

[LVCMOS Bit 3]

41

D4N

[NC]

LVDS Bit 4 Output Complement

[NC in LVCMOS]

42

D4P

[D4]

LVDS Bit 4 Output True

[LVCMOS Bit 4]

43

D5N

[NC]

LVDS Bit 5 Output Complement

[NC in LVCMOS]

44

D5P

[D5]

LVDS Bit 5 Output True

[LVCMOS Bit 5]

46

RLVDS

LVDS Bias Resistor (connect to OVSS with a 10kΩ, 1% resistor)

47

CLKOUTN

[NC]

LVDS Clock Output Complement

[NC in LVCMOS]

48

CLKOUTP

[CLKOUT]

LVDS Clock Output True

[LVCMOS CLKOUT]

49

D6N

[NC]

LVDS Bit 6 Output Complement

[NC in LVCMOS]

50

D6P

[D6]

LVDS Bit 6 Output True

[LVCMOS Bit 6]

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KAD5512P-50 Datasheet(PDF) 8 Page - Renesas Technology Corp

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