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© 2016 ROHM Co., Ltd. All rights reserved.

01.Nov.2016 Rev.001

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TSZ22111・15・001

BD9409F

TSZ02201-0T2T0C100230-1-2

3.5.5 OVP Detection

MS

PWM

3.0V

2.8V

3.0V

2.8V

3.0V

2.8V

Abnormal

COUNTER

OVP

SS

GATE

DIMOUT

Less than

Gate 4count

Gate 4count

Less than

Gate 4count

NORMAL

OVP

NORMAL

abnormal

NORMAL

OVP

NORMAL

STATE

OVP

abnormal

abnormal

0.4V

FAIL

REG90

AUTO COUNTER

131072 count

Latch off and

AUTO COUNTER

(*1)

(*2)

(*3)

(*4) (*5)

(*6)

(*7)

STB

Figure 34. OVP Detection

(*1)…As OVP is detected, the output GATE=L, DIMOUT=L, and the abnormal counter starts.

(*2)…If OVP is released within 4 clocks of abnormal counter of the GATE pin frequency, the boost operation restarts.

(*3)…As the OVP is detected again, the boost operation is stopped.

(*4)…As the OVP detection continues up to 4 count by the abnormal counter, IC will be latched off. After latched off, auto

counter starts counting.

(*5)… Once IC is latched off, the boost operation doesn't restart even if OVP is released.

external resistor of RT pin. (Please refer to the section 3.2.7.)

(*7)…The operation of the OVP detection is not related to the logic of PWM.