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DS1086L Datasheet(PDF) 10 Page - Maxim Integrated Products |
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DS1086L Datasheet(HTML) 10 Page - Maxim Integrated Products |
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10 / 16 page  3.3V Spread-Spectrum EconOscillator 10 ____________________________________________________________________ The output frequency is determined by the following equation: where: min frequency of selected OFFSET range is the lowest frequency (shown in Table 2 for the correspond- ing offset). DAC value is the value of the DAC register (0 to 1023). Prescaler is the value of 2x where x = 0 to 8. See the Example Frequency Calculations section for a more in-depth look at using the registers. ________________Register Definitions The DS1086L registers are used to program the output frequency, dither percent, dither rate, and 2-wire address. Table 1 shows a summary of the registers and detailed descriptions follow below. PRESCALER (02h) The PRESCALER word is a two-byte value containing control bits for the prescaler (P3 to P0), output control (Lo/ HiZ), the jitter rate (JS4 to JS3), as well as control bits for the jitter percentage (JS2 to JS0). The PRESCALER word is read and written using two-byte reads and writes beginning at address 02h. JS4 to JS3: Jitter Rate. This is the frequency of the tri- angle wave generator and the modulation frequency that the output is dithered. It can be programmed to the master oscillator frequency, fOSC, divided by either 8192, 4096, or 2048. JS4 JS3 JITTER RATE 00 fOSC/8192 01 fOSC/4096 (default) 10 fOSC/2048 fOUTPUT MIN FREQUENCY OF SELECTED OFFSET RANGE DAC VALUE kHz STEP SIZE PRESCALER ( ) ( ) = +× 5 OFFSET FREQUENCY RANGE (MHz) OS - 6 30.7 to 35.8 OS - 5 33.3 to 38.4 OS - 4 35.8 to 41.0 OS - 3 38.4 to 43.5 OS - 2 41.0 to 46.1 OS - 1 43.5 to 48.6 OS* 46.1 to 51.2 OS + 1 48.6 to 53.8 OS + 2 51.2 to 56.3 OS + 3 53.8 to 58.9 OS + 4 56.3 to 61.4 OS + 5 58.9 to 64.0 OS + 6 61.4 to 66.6 *Factory default setting. OS is the integer value of the five LSBs of the RANGE register. REGISTER ADDR MSB BINARY LSB FACTORY DEFAULT ACCESS PRESCALER 02h JS4 JS3 JS2 JS1 JS0 LO/ HiZ P3 P2 0110000 0 R/W PRESCALER — P1 P0 XX XX XX XX XX XX 00XXXXX R/W DAC (MSB) 08h b9 b8 b7 b6 b5 b4 b3 b2 01111101b R/W DAC (LSB) — b1 b0 X0 X0 X0 X0 X0 X0 00000000b R/W OFFSET 0Eh X1 X1 X1 b4 b3 b2 b1 b0 1 1 1 - - - - - b R/W ADDR 0Dh X1 X1 X1 X1 WC A2 A1 A0 11110000b R/W RANGE 37h XX XX XX b4 b3 b2 b1 b0 xxx- - - - - b R WRITE EE 3Fh NO DATA —— Table 1. Register Summary X0 = Don’t care, reads as zero. X1 = Don’t care, reads as one. XX = Don’t care, reads indeterminate. X = Don’t care. Table 2. Offset Settings |
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