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ISL85012 Datasheet(PDF) 11 Page - Renesas Technology Corp
RENESAS [Renesas Technology Corp]
ISL85012 Datasheet(HTML) 11 Page - Renesas Technology Corp
/ 19 page
Page 11 of 19
Mar 17, 2017
The ISL85012 combines a synchronous buck controller with a
pair of integrated switching MOSFETs. The buck controller drives
the internal high-side and low-side N-channel MOSFETs to deliver
load currents up to 12A. The buck regulator can operate from an
unregulated DC source, such as a battery, with a voltage ranging
from +3.8V to +18V. An internal 5V LDO voltage regulator is used
to bias the controller. The converter output voltage is
programmed using an external resistor divider and will generate
regulated voltages down to 0.6V. These features make the
regulator suited for a wide range of applications.
The controller uses a current mode loop, which simplifies the
loop compensation and permits fixed frequency operation over a
wide range of input and output voltages. The internal feedback
loop compensation option allows for simple circuit design.
600kHz (FREQ = float) and 300kHz (FREQ = GND) can be
selected as the default switching frequency. The regulator can be
synchronized from 100kHz to 1MHz by SYNC pin as well.
The buck regulator is equipped with a lossless current limit
scheme. The current in the output stage is derived from
temperature compensated measurements of the drain-to-source
voltage of the internal power MOSFETs.
The power-on reset circuitry and enable inputs prevent false
start-up of the PWM regulator output. Once all the input criteria
are met (see Figure 29), the controller soft-starts the output
voltage to the programmed level.
Enable and Soft-Start
Chip operation begins after V
PVIN, and V
exceed their rising
POR trip points. If EN is held low externally, nothing happens until
this pin is released. Once the voltage on the EN pin is above 0.6V,
the LDO powers up and soft-start control begins. The ISL85012
operates at Discontinuous Conduction Mode (DCM) during
soft-start. The soft-start time is 3ms. EN can be directly driven by
VIN or an external power supply. It is recommended to add an RC
filter at the EN pin if the signal which drives the EN is noisy.
The part is designed supporting start-up into a prebiased load
(the prebiased voltage requires to be less than the setting output
voltage). Both high-side and low-side switches are disabled until
the internal SS voltage exceeds the FB voltage during start-up.
PWM Control Scheme
The ISL85012 employs the current-mode Pulse-Width
Modulation (PWM) control scheme for fast transient response.
The current loop consists of the oscillator, the PWM comparator,
current sensing circuit, and the slope compensation circuit. The
gain of the current sensing circuit is typically 55mV/A and the
slope compensation is 780mV/t
= period). The control
reference for the current loop comes from the Error Amplifier’s
(EA) output, which compares the feedback signal at FB pin to the
integrated 0.6V reference.
Setting as internal compensation (COMP short to GND through a
200Ω resistor), the voltage loop is internally compensated with a
30pF and 800kΩ RC network either the switching regulator
works at default 600kHz (FREQ = float) or it is synchronized
externally by SYNC pin. A 30pF and 1200kΩ RC network is
implemented for internal compensation when It works at default
300kHz (FREQ = GND).
FIGURE 28. LOW-SIDE r
JUNCTION TEMPERATURE (°C)
FIGURE 29. POR CIRCUIT
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