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S29GL016A90BFIR13 Datasheet(PDF) 59 Page - SPANSION |
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S29GL016A90BFIR13 Datasheet(HTML) 59 Page - SPANSION |
59 / 89 page April 22, 2005 S29GL-A_00_A3 S29GL-A MirrorBit™ Flash Family 57 Ad vance Info rmat i o n Notes: 1. VA = Valid address for programming. During a sector erase operation, a valid address is any sector address within the sector being erased. During chip erase, a valid address is any non-protected sector address. 2. DQ7 should be rechecked even if DQ5 = 1 because DQ7 may change simultaneously with DQ5. Figure 7. Data# Polling Algorithm RY/BY#: Ready/Busy# The RY/BY# is a dedicated, open-drain output pin which indicates whether an Embedded Algorithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the command sequence. Since RY/BY# is an open-drain output, several RY/BY# pins can be tied together in parallel with a pull-up resistor to VCC. If the output is low (Busy), the device is actively erasing or programming. (This includes programming in the Erase Suspend mode.) If the output is high (Ready), the device is in the read mode, the standby mode, or in the erase-sus- pend-read mode. Table 32 on page 61 shows the outputs for RY/BY#. DQ7 = Data? Yes No No DQ5 = 1? No Yes Yes FAIL PASS Read DQ15–DQ0 Addr = VA Read DQ15–DQ0 Addr = VA DQ7 = Data? START |
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