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ISL62773 Datasheet(PDF) 31 Page - Renesas Technology Corp |
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ISL62773 Datasheet(HTML) 31 Page - Renesas Technology Corp |
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31 / 37 page  ISL62773 FN8263 Rev 1.00 Page 31 of 37 Dec 16, 2015 Substitution of Equation 28 and rewriting Equation 34, or substitution of Equation 32 and rewriting Equation 35, gives the same result as in Equation 36: One can use the full-load condition to calculate Rdroop. For example, given Iomax = 65A, Idroopmax = 45µA and LL = 2.1mΩ, Equation 36 gives Rdroop = 3.03kΩ. It is recommended to start with the Rdroop value calculated by Equation 36 and fine-tune it on the actual board to get accurate load line slope. One should record the output voltage readings at no load and at full load for load line slope calculation. Reading the output voltage at lighter load instead of full load will increase the measurement error. Compensator Figure 25 on page 29 shows the desired load transient response waveforms. Figure 31 shows the equivalent circuit of a voltage regulator (VR) with the droop function. A VR is equivalent to a voltage source (= VID) and output impedance Zout(s). If Zout(s) is equal to the load line slope LL, i.e., a constant output impedance, then in the entire frequency range, Vo will have a square response when Io has a square change. Intersil provides a Microsoft Excel-based spreadsheet to help design the compensator and the current sensing network so that VR achieves constant output impedance as a stable system. A VR with active droop function is a dual-loop system consisting of a voltage loop and a droop loop, which is a current loop. However, neither loop alone is sufficient to describe the entire system. The spreadsheet shows two loop gain transfer functions, T1(s) and T2(s), that describe the entire system. Figure 32 conceptually shows T1(s) measurement setup and Figure 33 conceptually shows T2(s) measurement setup. The VR senses the inductor current, multiplies it by a gain of the load line slope, adds it on top of the sensed output voltage and then feeds it to the compensator. T1 is measured after the summing node and T2 is measured in the voltage loop before the summing node. The spreadsheet gives both T1(s) and T2(s) plots. However, only T2(s) can actually be measured on an ISL62773 regulator. T1(s) is the total loop gain of the voltage loop and the droop loop. It always has a higher crossover frequency than T2(s), therefore has a higher impact on system stability. T2(s) is the voltage loop gain with closed droop loop, thus having a higher impact on output voltage response. Design the compensator to get stable T1(s) and T2(s) with sufficient phase margin and an output impedance equal to or smaller than the load line slope. Current Balancing Refer to Figures 17 through 24 for information on current balancing. The ISL62773 achieves current balancing through matching the ISEN pin voltages. Risen and Cisen form filters to remove the switching ripple of the phase node voltages. It is recommended to use a rather long RisenCisen time constant such that the ISEN voltages have minimal ripple and represent the DC current flowing through the inductors. Recommended values are Rs = 10kΩ and Cs = 0.22µF. Rdroop Io Idroop ---------------- LL = (EQ. 36) FIGURE 31. VOLTAGE REGULATOR EQUIVALENT CIRCUIT o i V o VID Zout(s) = LL LOAD VR FIGURE 32. LOOP GAIN T1(s) MEASUREMENT SETUP Q2 Q1 L iO COUT VO VIN GATE DRIVER COMP MOD. LOAD LINE SLOPE EA VID CHANNEL B CHANNEL A EXCITATION OUTPUT ISOLATION TRANSFORMER LOOP GAIN = CHANNEL B CHANNEL A NETWORK ANALYZER + + + - 20 FIGURE 33. LOOP GAIN T2(s) MEASUREMENT SETUP Q2 Q1 L IO CO VO VIN GATE DRIVER COMP MOD. LOADLINESLOPE EA VID CHANNEL B CHANNEL A EXCITATION OUTPUT ISOLATION TRANSFORMER LOOP GAIN = CHANNEL B CHANNEL A NETWORK ANALYZER + + + - 20 |
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