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ISL62771 Datasheet(PDF) 17 Page - Renesas Technology Corp

Part No. ISL62771
Description  Multiphase PWM Regulator for AMD Fusion™ Mobile CPUs Using SVI 2.0
Download  35 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ISL62771 Datasheet(HTML) 17 Page - Renesas Technology Corp

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ISL62771
FN8321 Rev 4.00
Page 17 of 35
November 18, 2015
Sometimes it is difficult to implement symmetrical layout. For
the circuit shown in Figure 16, asymmetric layout causes
different Rpcb1 and Rpcb2 values, thus creating a current
imbalance. Figure 17 shows a differential sensing current
balancing circuit recommended for ISL62771. The current
sensing traces should be routed to the inductor pads so they only
pick up the inductor DCR voltage. Each ISEN pin sees the average
voltage of two sources: its own, phase inductor phase-node pad
and the other phase inductor output side pad. Equations 8 and 9
give the ISEN pin voltages:
The ISL62771 will make VISEN1 = VISEN2 as shown in
Equation 10:
Rewriting Equation 10 gives Equation 11:
Therefore:
Current balancing (IL1 =IL2) is achieved when Rdcr1 =Rdcr2 .
Rpcb1and Rpcb2 do not have any effect.
Since the slave ripple capacitor voltages mimic the inductor
currents, the R3™ modulator can naturally achieve excellent
current balancing during steady state and dynamic operations.
Figure 18 shows the current balancing performance of the
evaluation board with load transient of 12A/51A at different rep
rates. The inductor currents follow the load current dynamic
change with the output capacitors supplying the difference. The
inductor currents can track the load current well at a low
repetition rate, but cannot keep up when the repetition rate gets
into the hundred-kHz range, where it is out of the control loop
bandwidth. The controller achieves excellent current balancing in
all cases installed.
VISEN1
V1p V2n
+
=
(EQ. 8)
VISEN2
V1n V2p
+
=
(EQ. 9)
V1p V2n
+
V1n V2p
+
=
(EQ. 10)
V1p V1n
V2p V2n
=
(EQ. 11)
Rdcr1 IL1
Rdcr2 IL2
=
(EQ. 12)
FIGURE 18. CURRENT BALANCING DURING DYNAMIC OPERATION.
CH1: IL1, CH2: ILOAD, CH3: IL2, CH4: IL3
REP RATE = 10kHz
REP RATE = 25kHz
REP RATE = 50kHz
REP RATE = 100kHz
REP RATE = 200kHz


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