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ISL6530CBZ Datasheet(PDF) 8 Page - Renesas Technology Corp |
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ISL6530CBZ Datasheet(HTML) 8 Page - Renesas Technology Corp |
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8 / 18 page  ISL6530 FN9052 Rev 2.00 Page 8 of 18 Nov 15, 2004 Shoot-Through Protection A shoot-through condition occurs when both the upper MOSFET and lower MOSFET are turned on simultaneously, effectively shorting the input voltage to ground. To protect the regulators from a shoot-through condition, the ISL6530 incorporates specialized circuitry which insures that complementary MOSFETs are not ON simultaneously. The adaptive shoot-through protection utilized by the VDDQ regulator looks at the lower gate drive pin, LGATE1, and the phase node, PHASE1, to determine whether a MOSFET is ON or OFF. If PHASE1 is below 0.8V, the upper gate is defined as being OFF. Similarly, if LGATE1 is below 0.8V, the lower MOSFET is defined as being OFF. This method of shoot-through protection allows the VDDQ regulator to source current only. Due to the necessity of sinking current, the VTT regulator employs a modified protection scheme from that of the VDDQ regulator. If the voltage from UGATE2 or from LGATE2 to GND is less than 0.8V, then the respective MOSFET is defined as being OFF and the other MOSFET is turned ON. Since the voltage of the lower MOSFET gates and the upper MOSFET gate of the VTT supply are being measured to determine the state of the MOSFET, the designer is encouraged to consider the repercussions of introducing external components between the gate drivers and their respective MOSFET gates before actually implementing such measures. Doing so may interfere with the shoot- through protection. Power Down Mode DDRAM systems include a sleep state in which the VDDQ voltage to the memories is maintained, but signaling is suspended. During this mode the VTT termination voltage is no longer needed. The only load placed on the VTT bus is the leakage of the associated signal pins of the DDRAM and memory controller ICs. When the V2_SD input of the ISL6530 is driven high, the VTT regulator is placed into a “sleep” state. In the sleep state the main VTT regulator is disabled, with both the upper and lower MOSFETs being turned off. The VTT bus is maintained at close to .5xVdd via a low current window regulator which drives VTT via the SENSE2 pin. Maintaining VTT at .5xVDDQ consumes negligible power and enables rapid wake-up from sleep mode without the need of softstarting the VTT regulator. During this power down mode, PGOOD is held LOW. Output Voltage Selection The output voltage of the VDDQ regulator can be programmed to any level between VIN (i.e. +5V) and the internal reference, 0.8V. An external resistor divider is used to scale the output voltage relative to the reference voltage and feed it back to the inverting input of the error amplifier, see Figure 3. However, since the value of R1 affects the values of the rest of the compensation components, it is advisable to keep its value less than 5k . R4 can be calculated based on the following equation: If the output voltage desired is 0.8V, simply route VOUT1 back to the FB pin through R1, but do not populate R4. VTT Reference Overdrive The ISL6530 allows the designer to bypass the internal 50% tracking of VDDQ that is used as the reference for VTT. The ISL6530 was designed to divide down the VDDQ voltage by 50% through two internal matched resistances. These resistances are typically 200k . FIGURE 2. SOFT-START INTERVAL 0V TIME VCC (5V) (1V/DIV) T1 T2 T0 VDDQ (2.5V) VTT (1.25V) R4 R1 0.8V VOUT1 0.8V – -------------------------------------- = FIGURE 3. OUTPUT VOLTAGE SELECTION OF VDDQ + R1 COUT1 +5V VDDQ R4 LOUT ISL6530 C4 Q1 FB1 UGATE1 VCC BOOT1 COMP1 D1 R2 C2 C1 R3 C3 PHASE1 LGATE1 Q2 |
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