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S29GL016A90BFER12 Datasheet(PDF) 67 Page - SPANSION |
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S29GL016A90BFER12 Datasheet(HTML) 67 Page - SPANSION |
67 / 89 page April 22, 2005 S29GL-A_00_A3 S29GL-A MirrorBit™ Flash Family 65 Ad vance Info rmat i o n Test Conditions Note: Diodes are IN3064 or equivalent. Figure 11. Test Setup Key to Switching Waveforms Figure 12. Input Waveforms and Measurement Levels Table 33. Test Specifications Test Condition All Speeds Unit Output Load 1 TTL gate Output Load Capacitance, CL (including jig capacitance) 30 pF Input Rise and Fall Times 5 ns Input Pulse Levels 0.0 or VCC V Input timing measurement reference levels (See Note) 0.5 VCC V Output timing measurement reference levels 0.5 VCC V Waveform Inputs Outputs Steady Changing from H to L Changing from L to H Don’t Care, Any Change Permitted Changing, State Unknown Does Not Apply Center Line is High Impedance State (High Z) 2.7 kΩ CL 6.2 kΩ 3.3 V Device Under Test VCC 0.0 V Output Measurement Level Input 0.5 VCC 0.5 VCC |
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