Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

ISL6277 Datasheet(PDF) 17 Page - Renesas Technology Corp

Part No. ISL6277
Description  Multiphase PWM Regulator for AMD Fusion™ Mobile CPUs Using SVI 2.0
Download  37 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ISL6277 Datasheet(HTML) 17 Page - Renesas Technology Corp

Back Button ISL6277 Datasheet HTML 13Page - Renesas Technology Corp ISL6277 Datasheet HTML 14Page - Renesas Technology Corp ISL6277 Datasheet HTML 15Page - Renesas Technology Corp ISL6277 Datasheet HTML 16Page - Renesas Technology Corp ISL6277 Datasheet HTML 17Page - Renesas Technology Corp ISL6277 Datasheet HTML 18Page - Renesas Technology Corp ISL6277 Datasheet HTML 19Page - Renesas Technology Corp ISL6277 Datasheet HTML 20Page - Renesas Technology Corp ISL6277 Datasheet HTML 21Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 17 / 37 page
background image
ISL6277
FN8270 Rev 1.00
Page 17 of 37
Mar 8, 2012
As the load current increases from zero, the output voltage
droops from the VID programmed value by an amount
proportional to the load current, to achieve the load line. The
ISL6277 can sense the inductor current through the intrinsic DC
Resistance (DCR) of the inductors, as shown in Figures 3 and 4,
or through resistors in series with the inductors as shown in
Figure 5. In both methods, capacitor Cn voltage represents the
total inductor current. A droop amplifier converts Cn voltage into
an internal current source with the gain set by resistor Ri. The
current source is used for load line implementation, current
monitoring and overcurrent protection.
Figure 14 shows the load-line implementation. The ISL6277
drives a current source (Idroop) out of the FB pin, as described by
Equation 1.
When using inductor DCR current sensing, a single NTC element
is used to compensate the positive temperature coefficient of the
copper winding, thus sustaining the load-line accuracy with
reduced cost.
Idroop flows through resistor Rdroop and creates a voltage drop as
shown in Equation 2.
Vdroop is the droop voltage required to implement load line.
Changing Rdroop or scaling Idroop can change the load line slope.
Since Idroop also sets the overcurrent protection level, it is
recommended to first scale Idroop based on OCP requirement,
then select an appropriate Rdroop value to obtain the desired
load line slope.
Differential Sensing
Figure 14 also shows the differential voltage sensing scheme.
VCCSENSE and VSSSENSE are the remote voltage sensing signals
from the processor die. A unity gain differential amplifier senses
the VSSSENSE voltage and adds it to the DAC output. The error
amplifier regulates the inverting and non-inverting input voltages
to be equal as shown in Equation 3:
Rewriting Equation 3 and substituting Equation 2 gives Equation 4
the exact equation required for load-line implementation.
The VCCSENSE and VSSSENSE signals come from the processor die.
The feedback is open circuit in the absence of the processor. As
Figure 14 shows, it is recommended to add a “catch” resistor to feed
the VR local output voltage back to the compensator, and to add
another “catch” resistor to connect the VR local output ground to the
RTN pin. These resistors, typically 10Ω~100Ω, provide voltage
feedback if the system is powered up without a processor installed.
Phase Current Balancing
The ISL6277 monitors individual phase average current by
monitoring the ISEN1, ISEN2, and ISEN3 voltages. Figure 15
shows the recommended current balancing circuit for DCR
sensing. Each phase node voltage is averaged by a low-pass filter
consisting of Risen and Cisen, and is presented to the
corresponding ISEN pin. Risen should be routed to the inductor
phase-node pad in order to eliminate the effect of phase node
parasitic PCB DCR. Equations 5 through 7 give the ISEN pin
voltages:
where Rdcr1, Rdcr2 and Rdcr3 are inductor DCR; Rpcb1, Rpcb2
and Rpcb3 are parasitic PCB DCR between the inductor output
side pad and the output voltage rail; and IL1, IL2 and IL3 are
inductor average currents.
FIGURE 14. DIFFERENTIAL SENSING AND LOAD LINE
IMPLEMENTATION
X 1
E/A
DAC
SVID[7:0]
Rdroop
Idroop
VDAC
Vdroop
FB
COMP
VCCSENSE
VSSSENSE
RTN
VSS
INTERNAL TO IC
“CATCH” RESISTOR
“CATCH” RESISTOR
VR LOCAL VO
+
-
+-
+
+
-
SVC
SVD
Idroop
VCn
Ri
-----------
=
(EQ. 1)
Vdroop
Rdroop
Idroop
5
4
---


=
(EQ. 2)
VCCSENSE V
+
droop
VDAC VSSSENSE
+
=
(EQ. 3)
VCCSENSE VSSSENSE
VDAC Rdroop
Idroop
5
4
---


=
(EQ. 4)
FIGURE 15. CURRENT BALANCING CIRCUIT
INTERNAL
TO IC
VO
ISEN3
L3
Risen
Cisen
ISEN2
Risen
Cisen
ISEN1
Risen
Cisen
L2
L1
Rdcr3
Rdcr2
Rdcr1
PHASE3
PHASE2
PHASE1
IL3
IL2
IL1
Rpcb3
Rpcb2
Rpcb1
VISEN1
Rdcr1 Rpcb1
+
 I
L1
=
(EQ. 5)
VISEN2
Rdcr2 Rpcb2
+
 I
L2
=
(EQ. 6)
VISEN3
Rdcr3 Rpcb3
+
 I
L3
=
(EQ. 7)


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37 


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn