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OPA145IDGKR Datasheet(PDF) 4 Page - Texas Instruments |
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OPA145IDGKR Datasheet(HTML) 4 Page - Texas Instruments |
4 / 39 page 4 OPA145 SBOS427B – JUNE 2017 – REVISED MAY 2018 www.ti.com Product Folder Links: OPA145 Submit Documentation Feedback Copyright © 2017–2018, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) Input pins are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5 V beyond the supply rails must be current limited to 10 mA or less. (3) Short-circuit to VS / 2 (ground in symmetrical dual-supply setups), one amplifier per package. 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT Supply voltage, (V+) – (V–) Dual supply ±20 V Single supply 40 Signal input pins(2) Voltage (V–) – 0.5 (V+) + 0.5 Current ±10 mA Output short-circuit(3) Continuous Continuous Operating temperature, TA –55 150 °C Junction temperature, TJ 150 Storage temperature, Tstg –65 150 (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT VS Supply voltage, (V+) – (V–) Dual supply ±2.25 ±15 ±18 V Single supply 4.5 30 36 TA Ambient temperature –40 25 125 °C (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 6.4 Thermal Information: OPA145 THERMAL METRIC (1) OPA145 UNIT D (SOIC) DGK (VSSOP) DBV (SOT) 8 PINS 8 PINS 5 PINS RθJA Junction-to-ambient thermal resistance 136 143 205 °C/W RθJC(top) Junction-to-case (top) thermal resistance 74 47 200 °C/W RθJB Junction-to-board thermal resistance 62 64 113 °C/W ΨJT Junction-to-top characterization parameter 19.7 5.3 38.2 °C/W ΨJB Junction-to-board characterization parameter 54.8 62.8 104.9 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A N/A °C/W |
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