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ADS5121 Datasheet(PDF) 3 Page - Texas Instruments

Part No. ADS5121
Description  8-Channel, 10-Bit, 40MSPS, 1.8V CMOS ANALOG-TO-DIGITAL CONVERTER
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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ADS5121 Datasheet(HTML) 3 Page - Texas Instruments

 
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ADS5121
3
SBAS281
www.ti.com
ADS5121
DC CHARACTERISTICS
AVDD = DVDD = 1.8V, DRVDD = 3.3V, Clock = 40MSPS, 50% Clock Duty Cycle, –0.5dBFS Input Span, Internal Reference, IREFR = 6.8kΩ, TMIN = –40°C, TMAX = +85°C,
and typical values at TA = 25°C, unless otherwise noted.
PARAMETER
CONDITION
MIN
TYP
MAX
UNITS
RESOLUTION
10
Bits
DC ACCURACY
Differential Nonlinearity, DNL
–0.9
±0.4
+1.0
LSB
Integral Nonlinearity, INL
–1.5
±0.6
+1.5
LSB
No Missing Codes
Tested
Gain Error
External Reference
–0.6
0.1
+0.6
%FSR
Offset Error
External Reference
0.2
+1.8
%FSR
Gain Temperature Coefficient
6.0
ppm/
°C
Gain Matching
±0.4
%FSR
ANALOG INPUT
Input Voltage Range (AIN+, AIN–)
REFB
REFT
V
Input Voltage, Differential Full-Scale
1VPP
Input Common-Mode Range
(REFT + REFB) / 2
V
Input Resistance, RIN
fCLK = 40MSPS
83
k
Input Capacitance, CIN
5pF
INTERNAL REFERENCE VOLTAGES
Reference, Top (REFT)
1.30
1.34
1.42
V
Reference, Bottom (REFB)
0.76
0.82
0.87
V
Int Reference Temperature Coefficient
10
ppm/
°C
EXTERNAL REFERENCE GENERATION
Reference, Top (REFT)
1.15
1.25
1.35
V
Reference, Bottom (REFB)
0.65
0.75
0.85
V
Input Resistance, REFRIN
(between REFB and REFT)
80
POWER SUPPLY
fIN = 3.5MHz
Operating Supply Current, IDD
242
255
mA
Analog Operating Supply Current, IAVDD
155
170
mA
Digital Operating Supply Current, IDVDD
43
48
mA
Driver Operating Supply Current, IDRVDD
CL = 20pF, 3.3V
42
48
mA
CL = 20pF, 1.8V
22
30
mA
Operating Voltage
AVDD
1.65
1.8
2.0
V
DVDD
1.65
1.8
2.0
V
DRVDD
1.65
1.8
3.6
V
Power-Dissipation
DRVDD = 3.3V
500
525
mW
DRVDD = 1.8V
404
420
mW
Power Standby
CLK Running
62
70
mW
CLK Stopped
52
60
mW
PDREF = 1, External REF, CLK Running
12
15
mW
PDREF = 1, External REF, CLK Stopped
1.6
5
mW
Power-Supply Rejection Ratio, PSRR
±5%, AV
DD
2mV/V
ADS5121
DC CHARACTERISTICS
AVDD = DVDD = 1.8V, DRVDD = 3.3V, Clock = 40MSPS, 50% Clock Duty Cycle, –0.5dBFS Input Span, Internal Reference, and TMIN to TMAX, unless otherwise noted.
PARAMETER
CONDITION
MIN
TYP
MAX
UNITS
DIGITAL INPUTS (STBY A-H, PDREF, OE)
DRVDD = 3.3V/1.8V
High-Level Input Voltage, VIH
VIH = DRVDD
0.70 • DRVDD
V
Low-Level Input Voltage, VIL
VIL = 0V
0.25 • DRVDD
V
High-Level Input Current, IIH
±1
µA
Low-Level Input Current, IIL
±1
µA
DIGITAL INPUTS (DCASEL)
High-Level Input Voltage, VIH
VIH = DVDD
0.70 • DVDD
V
Low-Level Input Voltage, VIL
VIL = 0V
0.25 • DVDD
V
High-Level Input Current, IIH
±1
µA
Low-Level Input Current, IIL
±1
µA
DIGITAL OUTPUTS ( DRVDD = 3.3/1.8V)
High-Level Output Voltage, VOH
IOH = –50µA
0.8 • DRVDD
V
Low-Level Output Voltage, VOL
IOL = 50µA
0.2 • DRVDD
V
External Load Capacitance, CL
15
pF
3-State Leakage Current, ILEAK
OE = HIGH
±1
µA


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