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ISL6726 Datasheet(PDF) 19 Page - Renesas Technology Corp

Part No. ISL6726
Description  Active Clamp Forward PWM Controller
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Maker  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
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ISL6726 Datasheet(HTML) 19 Page - Renesas Technology Corp

 
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FN7654 Rev 0.00
Page 19 of 21
January 31, 2011
ISL6726
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
For additional products, see www.intersil.com/en/products.html
© Copyright Intersil Americas LLC 2011. All Rights Reserved.
All trademarks and registered trademarks are the property of their respective owners.
Determine the downslope:
Downslope = 0.125V/1.6µs = 78mV/µs. Now determine the
amount of voltage that must be added to the current sense
signal by the end of the On time.
Therefore,
An appropriate slope compensation capacitance for this example
would be 1/2 to 1/3 the calculated value, or between 150pF and
220pF.
Using MODE
The MODE pin configures the IC for standard or synchronous
rectification compatibility. If MODE is connected to VREF, standard
rectification compatibility is selected. Soft-stop and the minimum
duty cycle clamp are disabled. If MODE is connected to GND,
synchronous rectification compatibility is selected, and soft-stop
and the minimum duty cycle clamp are enabled.
Thermal Protection
An internal temperature sensor protects the device should the
junction temperature exceed +145°C. There is approximately
+15°C of hysteresis.
Ground Plane Requirements
Careful layout is essential for satisfactory operation of the device.
A good ground plane must be employed. Use a ground layer if
possible. The power ground should be connected to the control
ground at one point. VDD should be bypassed directly to GND with
good high frequency capacitance, such as a ceramic capacitor. A
small ceramic capacitor is also recommended for DCLIM.
The OUTM, and OUTAC of ISL6726 are very fast signals, and
should have very short direct paths to the power MOSFETs in
order to minimize inductance in the PC board traces. The return
path should be as short as possible. The components at the Pins
of SS, DCLIM, UV, DELAY, CT, and RTC should be as physically
close as possible to the IC. Proximity to high di/dt loops and high
dv/dt nodes should be avoided.
The CS signal requires proper filtering and the PWB layout is
critical for normal operation of the current related functions. A
RC filter may be required. The time constant should be no greater
than 25ns to prevent incorrect average current information. If a
current sense transformer is used, both leads of the secondary
winding should be routed to the CS filter components and to the
IC pins. The transformer return should be connected via a
dedicated PC board trace to the GND pin rather than through the
ground plane.
If a current sense resistor in series with the switching FET source
is used, a low inductance resistor is recommended. The low level
signals must avoid the high current path.
VSLOPE
1
2
--- 0.078 2.4
94mV
==
(EQ. 14)
CSLOPE MIN

18
6
10
2.4
6
10
0.094
------------------------
470pF
=
(EQ. 15)


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