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LMX2615-SP Datasheet(PDF) 10 Page - Texas Instruments |
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LMX2615-SP Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 91 page  tCES tCS R/W A6 A5 tCWH tCWL A0 MSB SDI CSB tCE tEWH SCK RB15 RB14 RB0 LSB MUXout tCES tCS R/W SDK A5 tCH tCWH tCWL A0 D15 D14 D0 MSB LSB tCE tEWH SDI CSB 10 LMX2615-SP SNAS739A – JUNE 2018 – REVISED JUNE 2018 www.ti.com Product Folder Links: LMX2615-SP Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Timing Requirements (continued) (3.2 V ≤ VCC ≤ 3.45 V, –55°C ≤ TA ≤ +125°C, except as specified. Nominal values are at VCC = 3.3 V, TA = 25°C) MIN NOM MAX UNIT DIGITAL INTERFACE READBACK SPECIFICATIONS fSPIReadb ack SPI readback speed See Figure 2 2 MHz tCE Clock to enable low time 50 ns tCS Clock to data wait time 50 ns tCWH Clock pulse width high 200 ns tCWL Clock pulse width low 200 ns tCES Enable to clock setup time 50 ns tEWH Enable pulse width high 100 ns Figure 1. Serial Data Input Timing Diagram There are several other considerations for writing on the SPI: • The R/W bit must be set to 0. • The data on SDI pin is clocked into a shift register on each rising edge on the SCK pin. • The CSB must be held low for data to be clocked. Device will ignore clock pulses if CSB is held high. • The CSB transition from high to low must occur when SCK is low. • When SCK and SDI lines are shared between devices, TI recommends hold the CSB line high on the device that is not to be clocked. Figure 2. Serial Data Readback Timing Diagram There are several other considerations for SPI readback: • The R/W bit must be set to 1. • The MUXout pin will always be low for the address portion of the transaction. • The data on MUXout is clocked out on the rising edge of SCK. • The data portion of the transition on the SDI line is always ignored. |
Similar Part No. - LMX2615-SP |
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Similar Description - LMX2615-SP |
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