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ISL6327ACRZ Datasheet(PDF) 17 Page - Renesas Technology Corp |
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ISL6327ACRZ Datasheet(HTML) 17 Page - Renesas Technology Corp |
17 / 30 page ISL6327A FN6833 Rev 0.00 Page 17 of 30 Feb 17, 2009 Figure 5 shows a current proportional to the average current of all active channels, IAVG, flows from FB through a load- line regulation resistor RFB. The resulting voltage drop across RFB is proportional to the output current, effectively creating an output voltage droop with a steady-state value defined using Equation 8: The regulated output voltage is reduced by the droop voltage VDROOP. The output voltage as a function of load current is derived by combining Equation 8 with the appropriate sample current expression defined by the current sense method employed in Equation 9. Where VREF is the reference voltage, VOFS is the programmed offset voltage, IOUT is the total output current of the converter, RISEN is the sense resistor connected to the ISEN+ pin, and RFB is the feedback resistor, N is the active channel number, and RX is the DCR, or RSENSE depending on the sensing method. Therefore, the equivalent loadline impedance (i.e. Droop impedance) is equal to Equation 10: Output-Voltage Offset Programming The ISL6327A allows the designer to accurately adjust the offset voltage. When a resistor, ROFS, is connected between OFS to VCC, the voltage across it is regulated to 1.6V. This causes a proportional current (IOFS) to flow into OFS. If ROFS is connected to ground, the voltage across it is regulated to 0.4V, and IOFS flows out of OFS. A resistor between DAC and REF, RREF, is selected so that the product (IOFS x ROFS) is equal to the desired offset voltage. These functions are shown in Figure 6. Once the desired output offset voltage has been determined, use Equation 11 to set ROFS: For Positive Offset (connect ROFS to VCC): For Negative Offset (connect ROFS to GND): 1 000111 0 0.72500 1 000111 1 0.71875 1 001000 0 0.71250 1 001000 1 0.70625 1 001001 0 0.70000 1 001001 1 0.69375 1 001010 0 0.68750 1 001010 1 0.68125 1 001011 0 0.67500 1 001011 1 0.66875 1 001100 0 0.66250 1 001100 1 0.65625 1 001101 0 0.65000 1 001101 1 0.64375 1 001110 0 0.63750 1 001110 1 0.63125 1 001111 0 0.62500 1 001111 1 0.61875 1 010000 0 0.61250 1 010000 1 0.60625 1 010001 0 0.60000 1 010001 1 0.59375 1 010010 0 0.58750 1 010010 1 0.58125 1 010011 0 0.57500 1 010011 1 0.56875 1 010100 0 0.56250 1 010100 1 0.55625 1 010101 0 0.55000 1 010101 1 0.54375 1 010110 0 0.53750 1 010110 1 0.53125 1 010111 0 0.52500 1 010111 1 0.51875 1 011000 0 0.51250 1 011000 1 0.50625 1 011001 0 0.50000 1 111111 0 OFF 1 111111 1 OFF TABLE 3. VR11 VID 8-BIT (Continued) VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VOLTAGE VDROOP IAVG RFB = (EQ. 8) VOUT VREF VOFS – IOUT N ------------- RX RISEN ------------------RFB – = (EQ. 9) RLL RFB N ------------ RX RISEN ------------------ = (EQ. 10) ROFS 1.6 RREF VOFFSET ------------------------------ = (EQ. 11) ROFS 0.4 RREF VOFFSET ------------------------------ = (EQ. 12) |
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