THS1240

12-BIT 40 MSPS IF SAMPLING COMMUNICATIONS

ANALOG-TO-DIGITAL CONVERTER

SLAS279D – JUNE 2000 – REVISED JANUARY 2001

8

POST OFFICE BOX 655303

APPLICATION INFORMATION

using the THS1240 references

The option of internal or external reference is provided by allowing for an external connection of the internal

reference to the reference inputs. This type of reference selection offers the lowest noise possible by not relying

on any active switch to make the selection. Compensating each reference output with a 1-

µF and 0.01-µF chip

0.01-

µF chip capacitor as shown in Figure 7.

0.01

µF

1

µF

0.01

µF

1

µF

VREFIN+

VREFOUT+

VREFIN–

VREFOUT–

Figure 6. Internal Reference Usage

Figure 7. External Reference Usage

0.01

µF

0.1

µF

0.01

µF

0.1

µF

External Reference +

VREFIN+

VREFIN–

External Reference –

using the THS1240 clock input

The THS1240 clock input can be driven with either a differential clock signal or a single ended clock input with

little or no difference in performance between the single-ended and differential-input configurations. The

degradation. The clock input should be either a sinewave or a square wave having a 50% duty cycle.

When driven with a single-ended CMOS clock input, it is best to connect the CLK– input to ground with a 0.01

µF

capacitor (see Figure 8).

CLK+

THS1240

CLK–

Square Wave or Sine Wave

2 V p-p to 5 V p-p

Common Mode Voltage = VDD/2

0.01

µF

Figure 8. Driving the Clock From a Single-Ended Clock Source