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PCA9558 Datasheet(PDF) 6 Page - NXP Semiconductors

Part No. PCA9558
Description  8-bit I2C and SMBus I/O port with 5-bit multiplexed/1-bit latched 6-bit I2C EEPROM and 2 k bit EEPROM
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Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
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PCA9558 Datasheet(HTML) 6 Page - NXP Semiconductors

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Philips Semiconductors
Product data
PCA9558
8-bit I2C and SMBus I/O port with 5-bit multiplexed/1-bit
latched 6-bit I2C EEPROM and 2 k bit EEPROM
2002 May 24
6
The Multiplexer function controls the six open drain outputs, MUX_OUTx and NON_MUXED_OUT. This control is effected by the input pins
MUX_SELECT (Pin 19), MUX_OUT_LOW (Pin 26), and/or an internal register programmed via the I2C-bus. Upon power-up the multiplex
function is controlled by the MUX_SELECT and MUX_OUT_LOW pins. When the MUX_SELECT signal is a logic 0, the multiplexer will select
the data from the 6-bit EEPROM to drive on the MUX_OUTx and NON_MUXED_OUT pins. When the MUX_SELECT signal is a logic 1, the
multiplexer will select the MUX_INx pins to drive on the MUX_OUTx pins. The NON_MUXED_OUT output is latched from the 6-bit EEPROM on
a rising edge of the MUX_SELECT signal. This latch is transparent while the MUX_SELECT signal is a logic 0. An internal control register,
written via the I2C bus, can also control the multiplexer function. When this register is written, the MUX_SELECT function can change from the
external pin to an internal register. In this register a bit will act in a similar fashion to the MUX_SELECT input, i.e., a logic 1 will cause the
multiplexer to select data from the 6-bit EEPROM to drive on the MUX_OUTx and NON_MUXED_OUT pins. In this configuration, the
NON_MUXED_OUT will latch data when the PCA9558 acknowledges the I2C-bus. The MUX_SELECT pin will have no effect on the
MUX_OUTx or NON_MUXED_OUT while in this mode. When the MUX_OUT_LOW signal is a logic 0 and the multiplexer is configured so that
the MUX_OUTx pins are being driven by the 6-bit EEPROM, the MUX_OUTx pins will be driven to a logic 0. This information is summarized in
Table 1.
Table 1. Multiplexer function table
REG.
INPUT
OUTPUT
B13
B03
MUX_OUT_LOW
MUX_SELECT
MUX_OUTx
NON_MUXED_OUT
x
0
0
1
MUX_INx inputs
latched from EEPROM1
x
0
0
0
0
0
x
0
1
1
MUX_INx inputs
latched from EEPROM1
x
0
1
0
from EEPROM
from EEPROM
0
1
0
x
MUX_INx inputs
latched from EEPROM2
1
1
0
x
0
0
0
1
1
x
MUX_INx inputs
latched from EEPROM2
1
1
1
x
from EEPROM
from EEPROM
NOTES:
1. NON_MUXED_OUT value will be the value present in the 6-bit EEPROM at the time of the rising edge of the MUX_SELECT input.
2. NON_MUXED_OUT value will be the value present int he 6-bit EEPROM at the time of the slave ACK when bit1 has changed from 0 to 1.
3. These are the 2LSBs of the MUXCNTRL (Mux Control) Register
If the MUX_OUTx outputs are being driven by the 6-bit EEPROM and this EEPROM is programmed, the outputs will remain stable and change
to the new values after the EEPROM program cycle completes.
Examples of Read/Write for MUX control can be found in Figure 5.
S
1001
11 A0
0
A
00001
011
A
P
SLAVE ADDRESS
R/W
ACKNOWLEDGE
FROM SLAVE
ACKNOWLEDGE
FROM SLAVE
COMMAND BYTE
DATA BYTE
SW00635
000000 B1 B0 A
ACKNOWLEDGE
FROM SLAVE
Figure 5. I2C write for MUXCNTRL register
SW00636
S
100111 A0
0
A
0
0
001011
A
SLAVE ADDRESS
R/W
ACKNOWLEDGE
FROM SLAVE
ACKNOWLEDGE
FROM SLAVE
COMMAND BYTE
SLAVE ADDRESS
S
ACKNOWLEDGE
FROM SLAVE
A
10
011
1 A0
1
P
000
000 B1 B0 NA
DATA FROM SLAVE
NO ACKNOWLEDGE
FROM MASTER
R/W
Figure 6. I2C read for MUXCNTRL register


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