LTC4302-1/LTC4302-2

11

sn430212 430212fs

Table 2. Register 1 Definition

BIT

NAME

TYPE

FUNCTION

7 (MSB) CONNECT Read/Write Backplane-to-Card Connection;

0 = Disconnected, 1 = Connected

6

DATA IN2 Read/Write Logic State of Input Signal to GPIO2

Block

5

DATA IN1 Read/Write Logic State of Input Signal to GPIO1

Block

4

DATA2

Read Only

Logic State of GPIO2 Pin

3

DATA1

Read Only

Logic State of GPIO1 Pin

2

NA

Read Only

Never Used, Always 0

1

NA

Read Only

Never Used, Always 0

0

NA

Read Only

Never Used, Always 0

Default State (MSB First): 011DD000

Note: The second and third bits of the data byte are used to write the data

value of the two GPIOs. During a write operation, the five read only bits are

ignored. During a read operation, bits 7 to 3 will be shifted onto the data

bus, followed by three 0s. Also note that DATA2 and DATA IN2 are

meaningless for the LTC4302-2 because there is no GPIO2 pin for that

option.

OPERATIO

bit (R/W) and determines whether the master is writing to

or reading from the slave. Figure 2 shows a timing diagram

of the Start Bit and Address Byte required for both reading

and writing the LTC4302.

Programmable Features

The two-wire bus can be used to connect and disconnect

the card and backplane SDA and SCL busses, enable and

disable the rise time accelerators on either or both the

backplane and card sides, and configure and write to the

two GPIO pins (only one GPIO for the LTC4302-2). The bits

that control these features are stored in two registers. For

ease of software coding, the bits that are expected to

change more frequently are stored in the first register. In

addition, the bus can be used to read back the logic states

of the control bits. The maximum SCL frequency is 400kHz.

Writing to the LTC4302

The LTC4302 can be written using three different formats,

which are shown in Figures 3, 5 and 6. Each format begins

with a Start Bit, followed by the Address Byte as discussed

above. The procedure for writing one data byte is given by

the SMBus Send Byte protocol, illustrated in Figure 3. The

bits of the Data Byte are stored in the LTC4302’s Register

1. Table 2 defines the functions of these control bits. The

MSB controls the connection between the backplane and

card two-wire busses. The next two bits are used to write

logic values to the two GPIO pins. Since the LTC4302-2

has only one GPIO pin, bit “DATA IN1” controls its logic

value and bit “DATA IN2” is ignored. The 5 LSBs are not

used in Write operations.

The LTC4302 can be written with two data bytes by using

the format shown in Figure 5. The Address Byte and first

Data Byte are exactly the same as they are for the Send Byte

SCL

SDA

START

CONDITION

STOP

CONDITION

ADDRESS

R/W

ACK

DATA

ACK

DATA

ACK

1 - 7

8

9

4302 F02

a6 - a0

b7 - b0

b7 - b0

1 - 7

8

9

1 - 7

8

9

P

S

START

ACK

11 a4 - a0

WR

d7 - d0

1

1

71

8

S

00

ACK

1

S

0

DATA

BYTE

SLAVE

ADDRESS

STOP

1

4302 F03

Figure 3. Writing One Byte Using Send Byte Protocol