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K21P80M50SF4V2 Datasheet(PDF) 29 Page - NXP Semiconductors |
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K21P80M50SF4V2 Datasheet(HTML) 29 Page - NXP Semiconductors |
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29 / 61 page  Table 20. Flash command timing specifications (continued) Symbol Description Min. Typ. Max. Unit Notes teewr8bers Byte-write to erased FlexRAM location execution time — 175 260 μs 3 teewr8b32k teewr8b64k Byte-write to FlexRAM execution time: • 32 KB EEPROM backup • 64 KB EEPROM backup — 385 475 1800 2000 μs μs — Word-write to FlexRAM for EEPROM operation teewr16bers Word-write to erased FlexRAM location execution time — 175 260 μs — teewr16b32k teewr16b64k Word-write to FlexRAM execution time: • 32 KB EEPROM backup • 64 KB EEPROM backup — — 385 475 1800 2000 μs μs — Longword-write to FlexRAM for EEPROM operation teewr32bers Longword-write to erased FlexRAM location execution time — 360 540 μs — teewr32b32k teewr32b64k Longword-write to FlexRAM execution time: • 32 KB EEPROM backup • 64 KB EEPROM backup — — 630 810 2050 2250 μs μs — 1. Assumes 25 MHz flash clock frequency. 2. Maximum times for erase parameters based on expectations at cycling end-of-life. 3. For byte-writes to an erased FlexRAM location, the aligned word containing the byte must be erased. 3.4.1.3 Flash high voltage current behaviors Table 21. Flash high voltage current behaviors Symbol Description Min. Typ. Max. Unit IDD_PGM Average current adder during high voltage flash programming operation — 2.5 6.0 mA IDD_ERS Average current adder during high voltage flash erase operation — 1.5 4.0 mA 3.4.1.4 Reliability specifications Table 22. NVM reliability specifications Symbol Description Min. Typ.1 Max. Unit Notes Program Flash tnvmretp10k Data retention after up to 10 K cycles 5 50 — years — tnvmretp1k Data retention after up to 1 K cycles 20 100 — years — Table continues on the next page... Peripheral operating requirements and behaviors Kinetis K21D Sub-Family Data Sheet, Rev6, 04/2014. 29 Freescale Semiconductor, Inc. |
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