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LTC6252 Datasheet(PDF) 32 Page - Linear Technology

Part # LTC6252
Description  Octal, 18-Bit, 200ksps Differential SoftSpan ADC with Wide Input Common Mode Range
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC6252 Datasheet(HTML) 32 Page - Linear Technology

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LTC2345-18
32
234518f
For more information www.linear.com/LTC2345-18
applicaTions inForMaTion
throughput. Together, these I/O interface options enable
the LTC2345-18 to communicate equally well with legacy
microcontrollers and modern FPGAs.
Serial CMOS I/O Mode
As shown in Figure 17, in CMOS I/O mode the serial data
bus consists of a serial clock input, SCKI, serial data
input, SDI, serial clock output, SCKO, and eight lanes of
serial data output, SDO0 to SDO7. Communication with
the LTC2345-18 across this bus occurs during predefined
data transaction windows. Within a window, the device
accepts 24-bit SoftSpan configuration words for the next
conversion on SDI and outputs 24-bit packets containing
conversion results and channel configuration information
from the previous conversion on SDO0 to SDO7. New
data transaction windows open 10ms after powering up
or resetting the LTC2345-18, and at the end of each con-
version on the falling edge of BUSY. In the recommended
use case, the data transaction should be completed with
a minimum tQUIET time of 20ns prior to the start of the
next conversion, as shown in Figure 17. New SoftSpan
configuration words are only accepted within this recom-
mended data transaction window, but SoftSpan changes
take effect immediately with no additional analog input
settling time required before starting the next conversion.
It is still possible to read conversion data after starting the
nextconversion,butthiswilldegradeconversionaccuracy
and therefore is not recommended.
Just prior to the falling edge of BUSY and the opening of
a new data transaction window, SCKO is forced low and
SDO0 to SDO7 are updated with the latest conversion
results from analog input channels 0 to 7, respectively.
Rising edges on SCKI serially clock conversion results
and analog input channel configuration information out
on SDO0 to SDO7 and trigger transitions on SCKO that are
skew-matched to the data on SDO0 to SDO7. The resulting
C2 C1 C0
C2 C1 C0
S23
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
S22 S21 S20 S19 S18 S17 S16 S15 S14 S13 S12 S11 S10 S9 S8 S7 S6 S5
S3
S4
S1
S2
S0
D17
D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
SS1
SS2
SS0 D17
CNV
CS = PD = 0
DON’T CARE
tACQ
BUSY
SDO7
SCKO
SDO0
SCKI
SDI
DON’T CARE
SAMPLE N
RECOMMENDED DATA TRANSACTION WINDOW
SAMPLE N + 1
SOFTSPAN CONFIGURATION WORD FOR CONVERSION N + 1
CHANNEL 0
24-BIT PACKET
CONVERSION N
CHANNEL 1
24-BIT PACKET
CONVERSION N
CHANNEL 7
24-BIT PACKET
CONVERSION N
CHANNEL 0
24-BIT PACKET
CONVERSION N
234518 TD01
CONVERSION RESULT
CHANNEL ID SOFTSPAN
CONVERSIONRESULT
D17
D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
SS1
SS2
SS0 D17
DON’T CARE
CONVERSION RESULT
CHANNEL ID SOFTSPAN
CONVERSIONRESULT
tSCKI
tSCKIH
tBUSYLH
tSCKIL
tHSDOSCKI
tDSDOSCKI
tSSDISCKI
tQUIET
tHSDISCKI
tDSDOBUSYL
tCNVH
tSKEW
tCONV
tCNVL
tCYC
Figure 17. Serial CMOS I/O Mode


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