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LTC4251B Datasheet(PDF) 12 Page - Linear Technology

Part No. LTC4251B
Description  Negative Voltage Hot Swap Controllers in SOT-23
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Maker  LINER [Linear Technology]
Homepage  http://www.linear.com
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LTC4251B Datasheet(HTML) 12 Page - Linear Technology

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12
4251b12f
LTC4251B/LTC4251B-1/
LTC4251B-2
Overvoltage conditions detected by the OV comparator
will also pull GATE low, thereby shutting down the load,
but it will not reset the circuit breaker latch. Returning the
supply voltage to an acceptable range restarts the GATE
pin provided all interlock conditions except TIMER are met.
TIMER
The operation of the TIMER pin is somewhat complex as
it handles several key functions. A capacitor, CT, is used at
TIMER to provide timing for the LTC4251B/LTC4251B-1/
LTC4251B-2. Four different charging and discharging
modes are available at TIMER:
1. 5.8μA slow charge; initial timing delay
2. 230μA fast charge; circuit breaker delay
3. 5.8μA slow discharge; circuit breaker “cool-off”
4. Low impedance switch; resets capacitor after initial
timing delay, in undervoltage lockout, and in overvoltage
For initial startup, the 5.8μA pull-up is used. The low im-
pedance switch is turned off and the 5.8μA current source
is enabled when the four interlock conditions are met. CT
charges to 4V in a time period given by:
t=
4V • CT
5.8μA
(1)
When CT reaches 4V (VTMRH), the low impedance switch
turns on and discharges CT. The GATE output is enabled
and the load turns on.
CIRCUIT BREAKER TIMER OPERATION
If the SENSE pin detects more than 50mV across RS, the
TIMER pin charges CT with 230μA. If CT charges to 4V,
the GATE pin pulls low and the LTC4251B/LTC4251B-1/
LTC4251B-2 latch off. The part remains latched off until
either the UV/OV pin is momentarily pulsed low, or VIN
dips into UVLO and is then restored. The circuit breaker
timeout period is given by
t=
4V • CT
230μA
(2)
Intermittent overloads may exceed the 50mV threshold at
SENSE, but if their duration is sufficiently short TIMER will
not reach 4V and the LTC4251B/LTC4251B-1/LTC4251B-2
will not latch off. To handle this situation, the TIMER
discharges CT slowly with a 5.8μA pull-down whenever
the SENSE voltage is less than 50mV. Therefore any inter-
mittent overload with an aggregate duty cycle of 2.5% or
more will eventually trip the circuit breaker and latch off
the LTC4251B/LTC4251B-1/LTC4251B-2. Figure 3 shows
the circuit breaker response time in seconds normalized
to 1μF. The asymmetric charging and discharging of CT is
a fair gauge of MOSFET heating.
APPLICATIONS INFORMATION
GATE
GATE is pulled low to VEE under any of the following
conditions: in UVLO, during the initial timing cycle, in an
overvoltage condition, or when the LTC4251B/LTC4251B-1/
LTC4251B-2 are latched off after a short-circuit. When GATE
turns on, a 58μA current source charges the MOSFET gate
and any associated external capacitance. VIN limits gate
drive to no more than 14.5V.
Gate-drain capacitance (CGD) feed through at the first
abrupt application of power can cause a gate-source
voltage sufficient to turn on the MOSFET. A unique circuit
pulls GATE low with practically no usable voltage at VIN,
and eliminates current spikes at insertion. A large external
gate-source capacitor is thus unnecessary for the purpose
of compensating CGD. Instead, a smaller value (≥10nF)
capacitor CC is adequate. CC also provides compensation
for the analog current limit loop.
Figure 3. Circuit Breaker Response Time
FAULT DUTY CYCLE, D (%)
20
40
60
80
0
10
1
0.1
0.01
100
4251b12 F03
t
CT(μF)
4
=


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