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LT1819 Datasheet(PDF) 11 Page - Linear Technology |
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LT1819 Datasheet(HTML) 11 Page - Linear Technology |
11 / 26 page LTC2321-16 11 232116fc For more information www.linear.com/LTC2321-16 applicaTions inForMaTion OVERVIEW The LTC2321-16 is a low noise, high speed 16-bit succes- sive approximation register (SAR) ADC with differential inputs and a wide input common mode range. Operating from a single 3.3V or 5V supply, the LTC2321-16 has an 8VP-P differential input range, making it ideal for applica- tions which require a wide dynamic range. The LTC2321- 16 achieves ±4LSB INL typical, no missing codes at 16 bits and 81dB SNR. The LTC2321-16 has an onboard reference buffer and low drift (20ppm/°C max) 4.096V temperature-compensated reference. The LTC2321-16 also has a high speed SPI- compatible serial interface that supports CMOS or LVDS. The fast 2Msps per channel throughput with no cycle latency makes the LTC2321-16 ideally suited for a wide variety of high speed applications. The LTC2321-16 dis- sipates only 31mW per channel. Nap and sleep modes are also provided to reduce the power consumption of the LTC2321-16 during inactive periods for further power savings. CONVERTER OPERATION The LTC2321-16 operates in two phases. During the acquisition phase, the sample capacitor is connected to the analog input pins AIN+ and AIN– to sample the dif- ferential analog input voltage, as shown in Figure 3. A falling edge on the CNV pin initiates a conversion. During the conversion phase, the 16-bit CDAC is sequenced through a successive approximation algorithm, effectively comparing the sampled input with binary-weighted frac- tions of the reference voltage (e.g., VREFOUT/2, VREFOUT/4 … VREFOUT/32768) using the differential comparator. At the end of conversion, a CDAC output approximates the sampled analog input. The ADC control logic then pre- pares the 16-bit digital output code for serial transfer . The data is clocked out on each falling edge of the SCK+ input clock. TRANSFER FUNCTION The LTC2321-16 digitizes the full-scale voltage of 2 × REFOUT into 216 levels, resulting in an LSB size of 125µV with REFBUF = 4.096V. The ideal transfer function is shown in Figure 2. The output data is in 2’s comple- ment format. Analog Input The differential inputs of the LTC2321-16 provide great flexibility to convert a wide variety of analog signals with no configuration required. The LTC2321-16 digitizes the difference voltage between the AIN+ and AIN– pins while supporting a wide common mode input range. The analog input signals can have an arbitrary relationship to each other, provided that they remain between VDD and GND. The LTC2321-16 can also digitize more limited classes of analog input signals such as pseudo-differential uni- polar/bipolar and fully differential with no configuration required. Figure 2. LTC2321-16 Transfer Function Figure 3. The Equivalent Circuit for the Differential Analog Input of the LTC2321-16 RON 15 RON 15 BIAS VOLTAGE 232116 F03 CIN 10pF VDD CIN 10pF VDD AIN1– AIN1+ INPUT VOLTAGE (V) –FSR/2 232116 F02 011...111 011...110 111...111 100...000 100...001 000...000 000...001 –1 LSB FSR = +FS – –FS 1LSB = FSR/65535 0 1 LSB +FSR/2 –1 |
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