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LM2501SL Datasheet(PDF) 6 Page - National Semiconductor (TI) |
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LM2501SL Datasheet(HTML) 6 Page - National Semiconductor (TI) |
6 / 14 page Input Timing Requirements Over recommended operating supply and temperature ranges unless otherwise specified. (Note 2) Symbol Parameter Conditions Min Typ Max Units REFERENCE CLOCK (WCLK IN) f WC Clock Frequency 4 28 MHz WC DC Clock Duty Cycle 45 50 55 % t T Clock Transition Times (Rise or Fall, 10%–90%) 16 ns PIXEL CLOCK (PCLK) f PCLK Clock Frequency 4 16 MHz t CP Clock Period 62.5 250 ns CLK DC Clock Duty Cycle 45 50 55 % t T Clock transition Time 1 6 ns Note 1: “Absolute Maximum Ratings“ are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device should be operated at these limits. The tables of “Electrical Characteristics” specify conditions for device operation. Note 2: Typical values are given for VDD =VDDA = 3.0V and VDDIO = 2.7V and TA = 25˚C. Note 3: Current into a device pin is defined as positive. Current out of device pins is defined as negative. Voltages are referenced to Ground unless otherwise specified. Timing Diagrams 20091610 FIGURE 1. Serial Data Valid 20091611 FIGURE 2. Parallel Set, Hold and Data Valid www.national.com 6 |
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