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LTC3882 Datasheet(PDF) 7 Page - Linear Technology

Part # LTC3882
Description  PolyPhase Step-Down Slave Controller for Digital Power System Management
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC3882 Datasheet(HTML) 7 Page - Linear Technology

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LTC3870-1
7
38701f
For more information www.linear.com/LTC3870-1
pin FuncTions
to the PCB ground for electrical connection and rated
thermal performance.
VIN (Pin 17): Main Input Supply. Bypass this pin to GND
with a capacitor (0.1µF to 1µF).
FAULT0/FAULT1(Pin21/Pin20):FaultInputPins.Connect
these pins to the master chip GPIO pins to respond to
fault signals from the master controller. If this pin is low,
the PWM pin is in three-state. There is a 500kΩ pull-down
resistor on FAULT0/FAULT1 internally. These pins have to
be driven high externally for normal operation.
FREQ (Pin 22): Frequency Set Pin. There is a precision
10µA current flowing out of this pin. A resistor to ground
sets a voltage which in turn programs the frequency. This
pin sets the default switching frequency when there is no
externalclockontheSYNCpin. Settingthefrequencyclose
to the external clock helps the internal PLL sync to the
SYNC pin clock quickly and smoothly. See the Application
Section for the detailed information.
block DiagraM
10
11
15
9
24
3
21
23
10µA
SYNC
PHASMD
EXTVCC
INTVCC
INTVCC
IREV
ICMP
INTVCC
ITH0
ILIM
ISENSE0+
ISENSE0–
VCC0
L
ON
3K
REV
UVLO
FCNT
RUN
FAULT
GND
1.7V
RUN0
MODE0
FAULT0
PWM0
VIN
VIN
VOUT0
COUT0
CIN
4.8V
FREQ
CC
RC
19
27
17
14
18
1
2
16
SYNC
DET
PHASE
PROGRAM
OSC
PFD
VCO
UVLO
SLOPE
COMPENSATION
ILIM RANGE SELECT
HI: 1:1
LO: 1:1.5
SWITCH
LOGIC
S
R
Q
5.0V
EN
5.0V
EN
+
+
REF
LDO
LDO
+
+ –
+ –
+ –
38701 BD
1
71.1k
500k
500k
DrMOS
(CH0 Shown)


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