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LTC3787-1 Datasheet(PDF) 7 Page - Linear Technology |
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LTC3787-1 Datasheet(HTML) 7 Page - Linear Technology |
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7 / 20 page  LTC3872-1 7 38721f For more information www.linear.com/LTC3872-1 Main Control Loop The LTC3872-1 is a No RSENSE constant frequency, cur- rent mode controller for DC/DC boost, SEPIC and flyback converter applications. The LTC3872-1 is distinguished from conventional current mode controllers because the current control loop can be closed by sensing the voltage dropacrossthepowerMOSFETswitchoracrossadiscrete senseresistor,asshowninFigures1and2.ThisNo RSENSE sensing technique improves efficiency, increases power density and reduces the cost of the overall solution. For circuit operation, please refer to the Block Diagram of the IC and the Typical Application on the front page. In normal operation, the power MOSFET is turned on when the oscillator sets the RS latch and is turned off when the current comparator resets the latch. The divided-down outputvoltageiscomparedtoaninternal1.2Vreferenceby the error amplifier, which outputs an error signal at the ITH pin. The voltage on the ITH pin sets the current comparator input threshold. When the load current increases, a fall in the FB voltage relative to the reference voltage causes the ITH pin to rise, which causes the current comparator to trip at a higher peak inductor current value. The average inductor current will therefore rise until it equals the load current, thereby maintaining output regulation. The LTC3872-1 can be used either by sensing the voltage drop across the power MOSFET or by connecting the SW pin to a conventional sensing resistor in the source of the power MOSFET. Sensing the voltage across the power MOSFETmaximizesconverterefficiencyandminimizesthe component count; the maximum rating for this pin, 60V, allows MOSFET sensing in a wide output voltage range. The RUN/SS pin controls whether the IC is enabled or is in a low current shutdown state. With the RUN/SS pin below 0.85V, the chip is off and the input supply current is typically only 8µA. With an external capacitor connected to the RUN/SS pin an optional external soft-start is enabled. A 0.7µA trickle current will charge the capacitor, pulling the RUN/SS pin above shutdown threshold and slowly rampingRUN/SStolimittheVITHduringstart-up.Because the noise on the SW pin could couple into the RUN/SS pin, disrupting the trickle charge current that charges the RUN/SS pin, a 1M resistor is recommended to pull-up the RUN/SS pin when external soft-start is used. When RUN/SS is driven by an external logic, a minimum of 2.75V logic is recommended to allow the maximum ITH range. Light Load Operation Under very light load current conditions, the ITH pin volt- age will be very close to the zero current level of 0.85V. As the load current decreases further, an internal offset at the current comparator input will assure that the current comparatorremainstripped(evenatzeroloadcurrent)and the regulator will start to skip cycles, as it must, in order to maintain regulation. This behavior allows the regulator to maintain constant frequency down to very light loads, resulting in low output ripple as well as low audible noise and reduced RF interference, while providing high light load efficiency. Figure 1. SW Pin (Internal Sense Pin) Connection for Maximum Efficiency COUT VSW VOUT VIN GND L D + NGATE GND VIN SW 38721 F01 LTC3872-1 COUT VSW RSENSE VOUT VIN GND L D + NGATE GND VIN SW 38721 F02 LTC3872-1 Figure 2. SW Pin (Internal Sense Pin) Connection for Sensing Resistor operaTion |
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