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LTC3772 Datasheet(PDF) 10 Page - Linear Technology |
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LTC3772 Datasheet(HTML) 10 Page - Linear Technology |
10 / 32 page LTC3852 10 3852f PIN FUNCTIONS C– (Pin 8): Flying Capacitor Negative Terminal. SHDN (Pin 10): Active Low Shutdown Input. A low on SHDN disables the charge pump. This pin must not be allowed to float. GND1 (Pin 11): Charge Pump Ground. The (–) terminals of CIN and CVPUMP should be closely connected to this pin. VIN1 (Pin 12): Input Supply Voltage to Charge Pump. VIN1 should be bypassed with a 1μF to 4.7μF low ESR ceramic capacitor. VPUMP (Pin 13): Regulated Output Voltage from Charge Pump. For best performance, VPUMP should be bypassed with a low ESR ceramic capacitor providing at least 2.2μF of capacitance as close to the pin as possible. INTVCC (Pin 14): Gate Drive Supply. The MOSFET drivers and internal logic are powered from this voltage. Bypass this pin to GND with a minimum 2.2μF low ESR tantalum or ceramic capacitor, CINTVCC. VIN2 (Pin 15): Main Supply Pin for Step-Down Controller. A bypass capacitor should be tied between this pin and the GND2 pin. BOOST (Pin 16): Boosted Floating Driver Supply. The (+) terminal of the booststrap capacitor is connected to this pin. This pin swings from a diode voltage drop below INTVCC up to VIN1 + INTVCC. TG (Pin 17): Top Gate Driver Output. This is the output of a floating driver with a voltage swing equal to INTVCC superimposed on the switch node voltage. SW (Pin 18): Switch Node Connection to the Inductor. Vol- tage swing at this pin is from a diode (external) voltage drop below ground to the buck regulator power stage VIN. MODE/PLLIN (Pin 19): Forced Continuous Mode, Burst Mode operation or Pulse-Skipping Mode Selection Pin and External Synchronization Input to Phase Detector Pin. Connect this pin to INTVCC to force continuous conduction mode of operation. Connect to GND2 to enable pulse-skipping mode of operation. To select Burst Mode operation, tie this pin to INTVCC through a resistor no less than 50k, but no greater than 250k. A clock on the pin will force the controller into forced continuous mode of operation and synchronize the internal oscillator. FREQ/PLLFLTR (Pin 20): The phase-locked loop’s lowpass filter is tied to this pin. Alternatively, a resistor can be connected between this pin and GND2 to vary the frequency of the internal oscillator. RUN (Pin 21): Run Control Input. Forcing the pin below 1.25V shuts down the step-down controller. There is a 2μA pull-up current on this pin. TRACK/SS (Pin 22): Output Voltage Tracking and Soft-Start Input. A capacitor to ground at this pin sets the ramp rate for the output voltage. An internal soft-start current of 1μA charges this capacitor. ITH (Pin 23): Error Amplifier Output and Switching Regulator Compensation Point. The current comparator input threshold increases with this control voltage. VFB (Pin 24): Error Amplifier Feedback Input. This pin receives the remotely sensed feedback voltage from an external resistive divider across the output. GND (Exposed Pad Pin 25): Ground. Must be soldered to PCB, providing a local ground for the IC. |
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Similar Description - LTC3772 |
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