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May 25, 2004

IDT 79RC32355

TDMTEN

O

Low Drive TDM External Buffer Enable. This signal controls an external tri-state buffer output enable connected to the TDM output

data, TDMDOP. It is asserted low when the RC32355 is driving data on TDMDOP.

Primary function: General Purpose I/O, GPIOP[26]

General Purpose Input/Output

GPIOP[0]

I/O

Low Drive

with STI

General Purpose I/O. This pin can be configured as a general purpose I/O pin.

Alternate function: UART channel 0 serial output, U0SOUTP.

GPIOP[1]

I/O

Low Drive

with STI

General Purpose I/O. This pin can be configured as a general purpose I/O pin.

Alternate function: UART channel 0 serial input, U0SINP.

GPIOP[2]

I/O

Low Drive

with STI

General Purpose I/O. This pin can be configured as a general purpose I/O pin.

1st Alternate function: UART channel 0 ring indicator, U0RIN.

2nd Alternate function: JTAG boundary scan tap controller reset, JTAG_TRST_N.

GPIOP[3]

I/O

Low Drive

with STI

General Purpose I/O. This pin can be configured as a general purpose I/O pin.

Alternate function: UART channel 0 data carrier detect, U0DCRN.

GPIOP[4]

I/O

Low Drive

with STI

General Purpose I/O. This pin can be configured as a general purpose I/O pin.

1st Alternate function: UART channel 0 data terminal ready, U0DTRN.

2nd Alternate function: CPU or DMA transaction indicator, CPUP.

GPIOP[5]

I/O

Low Drive

with STI

General Purpose I/O. This pin can be configured as a general purpose I/O pin.

Alternate function: UART channel 0 data set ready, U0DSRN.

GPIOP[6]

I/O

Low Drive

with STI

General Purpose I/O. This pin can be configured as a general purpose I/O pin.

Alternate function: UART channel 0 request to send, U0RTSN.

GPIOP[7]

I/O

Low Drive

with STI

General Purpose I/O.

This pin can be configured as a general purpose I/O pin.

Alternate function: UART channel 0 clear to send, U0CTSN.

GPIOP[8]

I/O

Low Drive

with STI

General Purpose I/O. This pin can be configured as a general purpose I/O pin.

1st Alternate function: UART channel 1 serial output, U1SOUTP.

2nd Alternate function: Active DMA channel code, DMAP[3].

GPIOP[9]

I/O

Low Drive

with STI

General Purpose I/O. This pin can be configured as a general purpose I/O pin.

1st Alternate function: UART channel 1 serial input, U1SINP.

2nd Alternate function: Active DMA channel code, DMAP[2].

GPIOP[10]

I/O

Low Drive

with STI

General Purpose I/O. This pin can be configured as a general purpose I/O pin.

1st Alternate function: UART channel 1 data terminal ready, U1DTRN.

2nd Alternate function: ICE PC trace status, EJTAG_PCST[0].

GPIOP[11]

I/O

Low Drive

with STI

General Purpose I/O. This pin can be configured as a general purpose I/O pin.

1st Alternate function: UART channel 1 data set ready, U1DSRN.

2nd Alternate function: ICE PC trace status, EJTAG_PCST[1].

GPIOP[12]

I/O

Low Drive

with STI

General Purpose I/O. This pin can be configured as a general purpose I/O pin.

1st Alternate function: UART channel 1 request to send, U1RTSN.

2nd Alternate function: ICE PC trace status, EJTAG_PCST[2].

GPIOP[13]

I/O

Low Drive

with STI

General Purpose I/O. This pin can be configured as a general purpose I/O pin.

1st Alternate function: UART channel 1 clear to send, U1CTSN.

2nd Alternate function: ICE PC trace clock, EJTAG_DCLK.

GPIOP[14]

I/O

Low Drive

with STI

General Purpose I/O. This pin can be configured as a general purpose I/O pin.

GPIOP[15]

I/O

Low Drive

with STI

General Purpose I/O. This pin can be configured as a general purpose I/O pin.

GPIOP[16]

I/O

High Drive General Purpose I/O. This pin can be configured as a general purpose I/O pin.

Alternate function: Memory and peripheral bus chip select, CSN[4].

Name

Type I/O Type

Description

Table 1 Pin Descriptions (Part 3 of 8)