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NCP51530 Datasheet(PDF) 13 Page - ON Semiconductor
ONSEMI [ON Semiconductor]
NCP51530 Datasheet(HTML) 13 Page - ON Semiconductor
/ 25 page
For popular topologies like LLC, half bridge converters,
full bridge converters, two switch forward converter etc.
low−side high−side drivers are needed which perform the
function of both buffer and level shifter. These devices can
drive the gate of the topside MOSFETs whose source node
is a dynamically changing node. The bias for the high side
driver in these devices is usually provided through a
In a bid to make modern power supplies more compact
and efficient, power supply designers are increasingly
opting for high frequency operations. High frequency
operation causes higher losses in the drivers, hence reducing
the efficiency of the power supply.
NCP51530 is a 700 V high side−low side driver for
AC−DC power supplies and inverters. NCP51530 offers
best in class propagation delay, low quiescent current and
low switching current at high frequencies of operation. This
device thus enables highly efficient power supplies
operating at high frequencies.
NCP51530 is offered in two versions, NCP51530A/B.
NCP51530A has a typical 60 ns propagation delay, while
NCP51530B has propagation delay of 25 ns.
NCP51530 comes in SOIC8 and DFN10 packages.
SOIC8 package of the device is pin to pin compatible with
industry standard solutions.
NCP51530 has two independent input pins HI and LI
allowing it to be used in a variety of applications. This device
also includes features wherein, in case of floating input, the
logic is still defined. Driver inputs are compatible with both
CMOS and TTL logic hence it provides easy interface with
analog and digital controllers. NCP51530 has under voltage
lock out feature for both high and low side drivers which
ensures operation at correct V
voltage levels. The
output stage of NCP51530 has 2.2 A/1.7 A current
source/sink capability which can effectively charge and
discharge a 1 nF load in 15 ns.
NCP51530 has two independent input pins HIN and LIN
allowing it to be used in a variety of applications. The input
stages of NCP51530 are TTL and CMOS compatible. This
ensures that the inputs of NCP51530 can be driven with
3.3 V or 5 V logic signals from analog or digital PWM
controllers or logic gates.
The input pins have Schmitt triggers to avoid noise
induced logic errors. The hysteresis on the input pins is
typically 1.3 V. This high value ensures good noise
NCP51530 comes with an important feature wherein
outputs (HO, LO) stays low in case any of the input pin is
floating. At both the input pins there is an internal pull down
resistor to define its logic value in case the pin is left open
or NCP51530 is driven by open drain signal. The input logic
is explained in the Table 7 below.
NCP51530 input pins are also tolerant to negative voltage
below the GND pin level as long as it is within the ratings
defined in the datasheet. This tolerance allows the use of
transformer as an isolation barrier for input pulses.
NCP51530A features a noise rejection function to ensure
that any pulse glitch shorter than 30 ns will not produce any
output. These features are well illustrated in the Figure 28
NCP51530B has no such filters in the input stages. The
timing diagram NCP51530B is Figure 29 below.
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