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IDT74LVCH16244A Datasheet(PDF) 2 Page - Integrated Device Technology

Part No. IDT74LVCH16244A
Description  3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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IDT74LVCH16244A Datasheet(HTML) 2 Page - Integrated Device Technology

   
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INDUSTRIALTEMPERATURERANGE
2
IDT74LVCH16244A
3.3VCMOS16-BITBUFFER/DRIVERWITH3-STATEOUTPUTS
SSOP/ TSSOP/ TVSOP
TOP VIEW
PIN CONFIGURATION
Symbol
Description
Max
Unit
VTERM
Terminal Voltage with Respect to GND
–0.5 to +6.5
V
TSTG
Storage Temperature
–65 to +150
°C
IOUT
DC Output Current
–50 to +50
mA
IIK
Continuous Clamp Current,
–50
mA
IOK
VI < 0 or VO < 0
ICC
Continuous Current through each
±100
mA
ISS
VCC or GND
ABSOLUTE MAXIMUM RATINGS(1)
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
NOTE:
1. As applicable to the device type.
Symbol
Parameter(1)
Conditions
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
4.5
6
pF
COUT
Output Capacitance
VOUT = 0V
6.5
8
pF
CI/O
I/O Port Capacitance
VIN = 0V
6.5
8
pF
CAPACITANCE (TA= +25°C, F = 1.0MHz)
NOTE:
1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
1
OE
1
Y1
1
Y2
GND
1
Y3
1
Y4
VCC
2
Y1
2
Y2
GND
2
Y3
2
Y4
3
Y1
3
Y2
3
Y4
4
OE
GND
VCC
4
Y1
4
Y2
GND
4
Y3
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
40
41
42
43
44
45
46
47
48
1
2
OE
1
A1
1
A2
GND
1
A3
1
A4
VCC
2
A1
2
A2
2
A3
2
A4
3
A1
GND
3
A3
3
A4
4
A1
4
A2
GND
4
A3
4
A4
3
OE
3
Y3
4
Y4
VCC
3
A2
GND
NOTES:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High-Impedance
Inputs
Outputs
xOE
xAx
xYx
LL
L
LH
H
HX
Z
FUNCTION TABLE (EACH 4-BITBUFFER)(1)
Pin Names
Description
xAx
Data Inputs(1)
xYx
3-State Outputs
xOE
3-State Output Enable Inputs (Active LOW)
PIN DESCRIPTION


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